eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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ipbus_decode_efex_cntrl_infrastructure.vhd
1 ---------------------------------------------------------------------------------
2 -- Address decode logic for IPbus fabric.
3 --
4 -- This file has been AUTOGENERATED from the address table - do not
5 -- hand edit.
6 --
7 -- We assume the synthesis tool is clever enough to recognise
8 -- exclusive conditions in the if statement.
9 ---------------------------------------------------------------------------------
10 
11 library ieee;
12 use ieee.std_logic_1164.all;
13 use ieee.numeric_std.all;
14 
16 
17 -- START automatically generated VHDL (Tue Sep 3 11:28:20 2024)
18  constant IPBUS_SEL_WIDTH: positive := 3;
19 -- END automatically generated VHDL
20 
21  subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0);
22  function ipbus_sel_efex_cntrl_infrastructure(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t;
23 
24 -- START automatically generated VHDL (Tue Sep 3 11:28:20 2024)
25  constant N_SLV_MODULE_REG: integer := 0;
26  constant N_SLV_XADC: integer := 1;
27  constant N_SLV_RECONFIGURE: integer := 2;
28  constant N_SLV_I2C: integer := 3;
29  constant N_SLV_PLL_SPI_RAM: integer := 4;
30  constant N_SLV_FLASH_SPI_RAM: integer := 5;
31  constant N_SLV_RAM: integer := 6;
32  constant N_SLAVES: integer := 7;
33 -- END automatically generated VHDL
34 
36 
38 
39  function ipbus_sel_efex_cntrl_infrastructure(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t is
40  variable sel: ipbus_sel_t;
41  begin
42 
43 -- START automatically generated VHDL (Tue Sep 3 11:28:20 2024)
44  if std_match(addr, "-------------------0--00-000-0--") then
45  sel := ipbus_sel_t(to_unsigned(N_SLV_MODULE_REG, IPBUS_SEL_WIDTH)); -- module_reg / base 0x00000000 / mask 0x00001374
46  elsif std_match(addr, "-------------------0--00-01-----") then
47  sel := ipbus_sel_t(to_unsigned(N_SLV_XADC, IPBUS_SEL_WIDTH)); -- xadc / base 0x00000020 / mask 0x00001360
48  elsif std_match(addr, "-------------------0--00-100-1--") then
49  sel := ipbus_sel_t(to_unsigned(N_SLV_RECONFIGURE, IPBUS_SEL_WIDTH)); -- reconfigure / base 0x00000045 / mask 0x00001374
50  elsif std_match(addr, "-------------------0--00-101----") then
51  sel := ipbus_sel_t(to_unsigned(N_SLV_I2C, IPBUS_SEL_WIDTH)); -- i2c / base 0x00000050 / mask 0x00001370
52  elsif std_match(addr, "-------------------0--01-0------") then
53  sel := ipbus_sel_t(to_unsigned(N_SLV_PLL_SPI_RAM, IPBUS_SEL_WIDTH)); -- pll_spi_ram / base 0x00000100 / mask 0x00001340
54  elsif std_match(addr, "-------------------0--1---------") then
55  sel := ipbus_sel_t(to_unsigned(N_SLV_FLASH_SPI_RAM, IPBUS_SEL_WIDTH)); -- flash_spi_ram / base 0x00000200 / mask 0x00001200
56  elsif std_match(addr, "-------------------1------------") then
57  sel := ipbus_sel_t(to_unsigned(N_SLV_RAM, IPBUS_SEL_WIDTH)); -- ram / base 0x00001000 / mask 0x00001000
58  else
59  sel := ipbus_sel_t(to_unsigned(N_SLAVES, IPBUS_SEL_WIDTH));
60  end if;
61 -- END automatically generated VHDL
62 
63  return sel;
64 
65  end function ipbus_sel_efex_cntrl_infrastructure;
66 
68 
69 ---------------------------------------------------------------------------------