ipbus_decode_efex_cntrl_mgt.vhd

-- Address decode logic for ipbus fabric
-- 
-- This file has been AUTOGENERATED from the address table - do not hand edit
-- 
-- We assume the synthesis tool is clever enough to recognise exclusive conditions
-- in the if statement.
-- 
-- Dave Newbold, February 2011
 
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
 
package ipbus_decode_efex_cntrl_mgt is
 
  constant IPBUS_SEL_WIDTH: positive := 2;
  subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0);
  function ipbus_sel_efex_cntrl_mgt(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t;
 
-- START automatically  generated VHDL the Wed Aug  5 19:00:38 2020 
  constant N_SLV_MGT_114: integer := 0;
  constant N_SLV_MGT_115: integer := 1;
  constant N_SLV_MGT_116: integer := 2;
  constant N_SLAVES: integer := 3;
-- END automatically generated VHDL
 
    
end ipbus_decode_efex_cntrl_mgt;
 
package body ipbus_decode_efex_cntrl_mgt is
 
  function ipbus_sel_efex_cntrl_mgt(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t is
    variable sel: ipbus_sel_t;
  begin
 
-- START automatically  generated VHDL the Wed Aug  5 19:00:38 2020 
    if    std_match(addr, "----------------------00--------") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_MGT_114, IPBUS_SEL_WIDTH)); -- mgt_114 / base 0x00000000 / mask 0x00000300
    elsif std_match(addr, "----------------------01--------") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_MGT_115, IPBUS_SEL_WIDTH)); -- mgt_115 / base 0x00000100 / mask 0x00000300
    elsif std_match(addr, "----------------------10--------") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_MGT_116, IPBUS_SEL_WIDTH)); -- mgt_116 / base 0x00000200 / mask 0x00000300
-- END automatically generated VHDL
 
    else
        sel := ipbus_sel_t(to_unsigned(N_SLAVES, IPBUS_SEL_WIDTH));
    end if;
 
    return sel;
 
  end function ipbus_sel_efex_cntrl_mgt;
 
end ipbus_decode_efex_cntrl_mgt;