ipbus_decode_efex_infrastructure.vhd

-- Address decode logic for ipbus fabric
-- 
-- This file has been AUTOGENERATED from the address table - do not hand edit
-- 
-- We assume the synthesis tool is clever enough to recognise exclusive conditions
-- in the if statement.
-- 
-- Dave Newbold, February 2011
 
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
 
package ipbus_decode_efex_infrastructure is
 
  constant IPBUS_SEL_WIDTH: positive := 4;
  subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0);
  function ipbus_sel_efex_infrastructure(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t;
 
-- START automatically  generated VHDL the Tue Jul 25 14:40:19 2023 
  constant N_SLV_MODULE_REG: integer := 0;
  constant N_SLV_TOB_SYNCH: integer := 1;
  constant N_SLV_XADC: integer := 2;
  constant N_SLV_RECONFIGURE: integer := 3;
  constant N_SLV_TTC_ORBIT_LENGTH: integer := 4;
  constant N_SLV_BCMUXVALUE_SYNC: integer := 5;
  constant N_SLV_TOB_DELAY: integer := 6;
  constant N_SLV_TOB_BC_DELAY: integer := 7;
  constant N_SLV_FLASH_SPI_RAM: integer := 8;
  constant N_SLV_RAM: integer := 9;
  constant N_SLAVES: integer := 10;
-- END automatically generated VHDL
 
    
end ipbus_decode_efex_infrastructure;
 
package body ipbus_decode_efex_infrastructure is
 
  function ipbus_sel_efex_infrastructure(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t is
    variable sel: ipbus_sel_t;
  begin
 
-- START automatically  generated VHDL the Tue Jul 25 14:40:19 2023 
    if    std_match(addr, "-------------------0--0--000-00-") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_MODULE_REG, IPBUS_SEL_WIDTH)); -- module_reg / base 0x00000000 / mask 0x00001276
    elsif std_match(addr, "-------------------0--0--000-01-") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_TOB_SYNCH, IPBUS_SEL_WIDTH)); -- tob_synch / base 0x00000002 / mask 0x00001276
    elsif std_match(addr, "-------------------0--0--01-----") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_XADC, IPBUS_SEL_WIDTH)); -- xadc / base 0x00000020 / mask 0x00001260
    elsif std_match(addr, "-------------------0--0--100-101") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_RECONFIGURE, IPBUS_SEL_WIDTH)); -- reconfigure / base 0x00000045 / mask 0x00001277
    elsif std_match(addr, "-------------------0--0--100-110") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_TTC_ORBIT_LENGTH, IPBUS_SEL_WIDTH)); -- ttc_orbit_length / base 0x00000046 / mask 0x00001277
    elsif std_match(addr, "-------------------0--0--100-111") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_BCMUXVALUE_SYNC, IPBUS_SEL_WIDTH)); -- bcmuxvalue_sync / base 0x00000047 / mask 0x00001277
    elsif std_match(addr, "-------------------0--0--101-00-") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_TOB_DELAY, IPBUS_SEL_WIDTH)); -- tob_delay / base 0x00000050 / mask 0x00001276
    elsif std_match(addr, "-------------------0--0--110-00-") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_TOB_BC_DELAY, IPBUS_SEL_WIDTH)); -- tob_bc_delay / base 0x00000060 / mask 0x00001276
    elsif std_match(addr, "-------------------0--1---------") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_FLASH_SPI_RAM, IPBUS_SEL_WIDTH)); -- flash_spi_ram / base 0x00000200 / mask 0x00001200
    elsif std_match(addr, "-------------------1------------") then
      sel := ipbus_sel_t(to_unsigned(N_SLV_RAM, IPBUS_SEL_WIDTH)); -- ram / base 0x00001000 / mask 0x00001000
-- END automatically generated VHDL
 
    else
        sel := ipbus_sel_t(to_unsigned(N_SLAVES, IPBUS_SEL_WIDTH));
    end if;
 
    return sel;
 
  end function ipbus_sel_efex_infrastructure;
 
end ipbus_decode_efex_infrastructure;