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My Project
v0.0.16
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Processes | |
| stim_proc | ( ) |
Signals | |
| CPLD_CLK | std_logic := ' 0 ' |
| HW_ADDR | std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' ) |
| HW_ADDP | std_logic := ' 0 ' |
| P_ERROR | std_logic := ' 0 ' |
| HW_ATCA | std_logic_vector ( 7 downto 0 ) |
| FORCE_MASTER_n | std_logic := ' 1 ' |
| PL29_Link1_n | std_logic := ' 1 ' |
| HW_ADDR_BUF | std_logic_vector ( 4 downto 0 ) |
| CLOCK_MASTER_n | std_logic |
| SELECT_HUB_n | std_logic |
| DRIVE_INFO_n | std_logic |
| DRIVE_CLOCK_n | std_logic |
| FP_IPBUS_n | std_logic |
| FP_IPMC_n | std_logic |
| HUB1_LED_n | std_logic |
| NODE_LED_n | std_logic |
| AERR_LED_n | std_logic |
| IN_SHELF0_n | STD_LOGIC |
Instantiations | |
| uut | ATCA <Entity ATCA> |
| stim_proc | ( | ) |
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Instantiation |
1.8.13