RTL Architecture Reference

Processes
PROCESS_250	( CLK )
PROCESS_251	( CLK )
PROCESS_252	( CLK )
PROCESS_253	( CLK )
PROCESS_811	( CLK )
PROCESS_812	( CLK )
PROCESS_813	( CLK )
PROCESS_814	( CLK )

Constants
DLY	time := 1 ns

Signals
plllkdet_sync	std_logic
plllkdet_r	std_logic
reset_dly_ctr	unsigned ( 10 downto 0 )
reset_dly_done	std_logic
testdone_f	std_logic_vector ( 3 downto 0 )

Member Function Documentation

PROCESS_250()

PROCESS_250 (   CLK   )

Process

PROCESS_251()

PROCESS_251 (   CLK   )

Process

PROCESS_252()

PROCESS_252 (   CLK   )

Process

PROCESS_253()

PROCESS_253 (   CLK   )

Process

PROCESS_811()

PROCESS_811 (   CLK   )

Process

PROCESS_812()

PROCESS_812 (   CLK   )

Process

PROCESS_813()

PROCESS_813 (   CLK   )

Process

PROCESS_814()

PROCESS_814 (   CLK   )

Process

Member Data Documentation

DLY

DLY time := 1 ns

Constant

plllkdet_r

plllkdet_r std_logic

Signal

plllkdet_sync

plllkdet_sync std_logic

Signal

reset_dly_ctr

reset_dly_ctr unsigned ( 10 downto 0 )

Signal

reset_dly_done

reset_dly_done std_logic

Signal

testdone_f

testdone_f std_logic_vector ( 3 downto 0 )

Signal

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The documentation for this class was generated from the following file:

• components/ipbus_eth/firmware/gen_hdl/v6_emac_v2_3_basex/double_reset.vhd