RTL Architecture Reference

Collaboration diagram for RTL:

Functions
bit_vector	conv_qpll_fbdiv_top ( qpllfbdiv_top: in in integer )	[ impure ]
bit	conv_qpll_fbdiv_ratio ( qpllfbdiv_top: in in integer )	[ impure ]

Constants
QPLL_FBDIV_TOP	integer := 40
QPLL_FBDIV_IN	bit_vector ( 9 downto 0 ) := conv_qpll_fbdiv_top ( QPLL_FBDIV_TOP )
QPLL_FBDIV_RATIO	bit := conv_qpll_fbdiv_ratio ( QPLL_FBDIV_TOP )

Signals
tied_to_ground_i	std_logic
tied_to_ground_vec_i	std_logic_vector ( 63 downto 0 )
tied_to_vcc_i	std_logic
tied_to_vcc_vec_i	std_logic_vector ( 63 downto 0 )

Attributes
CORE_GENERATION_INFO	string
CORE_GENERATION_INFO	RTL : architecture is " DSS_3Quads_11g2_common , gtwizard_v3_6_7 , {protocol_file = Start_from_scratch} "

Instantiations
gthe2_common_i	gthe2_common

Member Function Documentation

conv_qpll_fbdiv_ratio()

bit conv_qpll_fbdiv_ratio (   qpllfbdiv_top in in integer   ) impure

Function

conv_qpll_fbdiv_top()

bit_vector conv_qpll_fbdiv_top (   qpllfbdiv_top in in integer   ) impure

Function

Member Data Documentation

CORE_GENERATION_INFO [1/2]

CORE_GENERATION_INFO string

Attribute

CORE_GENERATION_INFO [2/2]

CORE_GENERATION_INFO RTL : architecture is " DSS_3Quads_11g2_common , gtwizard_v3_6_7 , {protocol_file = Start_from_scratch} "

Attribute

gthe2_common_i

gthe2_common_i gthe2_common

Instantiation

QPLL_FBDIV_IN

QPLL_FBDIV_IN bit_vector ( 9 downto 0 ) := conv_qpll_fbdiv_top ( QPLL_FBDIV_TOP )

Constant

QPLL_FBDIV_RATIO

QPLL_FBDIV_RATIO bit := conv_qpll_fbdiv_ratio ( QPLL_FBDIV_TOP )

Constant

QPLL_FBDIV_TOP

QPLL_FBDIV_TOP integer := 40

Constant

tied_to_ground_i

tied_to_ground_i std_logic

Signal

tied_to_ground_vec_i

tied_to_ground_vec_i std_logic_vector ( 63 downto 0 )

Signal

tied_to_vcc_i

tied_to_vcc_i std_logic

Signal

tied_to_vcc_vec_i

tied_to_vcc_vec_i std_logic_vector ( 63 downto 0 )

Signal

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The documentation for this class was generated from the following file:

• FTM/DSS/mgts/dss_3quads_11g2_common.vhd