behavior Architecture Reference

Processes
CPLD_CLK_process	( )
CONTROL_CLK_process	( )
CABLE_CLK_process	( )
stim_proc	( )

Constants
CPLD_CLK_period	time := 10 ns
CONTROL_CLK_period	time := 10 ns
CABLE_CLK_period	time := 10 ns

Signals
CPLD_CLK	std_logic := ' 0 '
CONTROL_CSn	std_logic := ' 1 '
CONTROL_ENAB	std_logic := ' 0 '
CONTROL_MOSI	std_logic := ' 0 '
CONTROL_CLK	std_logic := ' 0 '
CONTROL_ADR	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
CABLE_PRESENT_n	std_logic := ' 0 '
CABLE_CLK	std_logic := ' 0 '
CABLE_MOSI	std_logic := ' 0 '
CABLE_CSn	std_logic := ' 1 '
CABLE_ADR	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
C_DONE	std_logic := ' 0 '
RPI_CE1N	std_logic := ' 0 '
RPI_GPIO6	std_logic := ' 0 '
RPI_GPIO5	std_logic := ' 0 '
RPI_ON	std_logic := ' 0 '
FLASH_SPI_MISO	std_logic := ' 0 '
CONTROL_MISO	std_logic
CABLE_MISO	std_logic
RPI_MISO	std_logic
CFLASH_SELn	std_logic
D1FLASH_SELn	std_logic
D2FLASH_SELn	std_logic
FLASH_SPI_CLK	std_logic
FLASH_SPI_MOSI	std_logic
FLASH_SPI_CSn	std_logic

Instantiations
uut	FLASH_SPI <Entity FLASH_SPI>

Member Function Documentation

CABLE_CLK_process()

CABLE_CLK_process ( )

Process

CONTROL_CLK_process()

CONTROL_CLK_process ( )

Process

CPLD_CLK_process()

CPLD_CLK_process

(

)

stim_proc()

stim_proc ( )

Process

Member Data Documentation

C_DONE

C_DONE std_logic := ' 0 '

Signal

CABLE_ADR

CABLE_ADR std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )

Signal

CABLE_CLK

CABLE_CLK std_logic := ' 0 '

Signal

CABLE_CLK_period

CABLE_CLK_period time := 10 ns

Constant

CABLE_CSn

CABLE_CSn std_logic := ' 1 '

Signal

CABLE_MISO

CABLE_MISO std_logic

Signal

CABLE_MOSI

CABLE_MOSI std_logic := ' 0 '

Signal

CABLE_PRESENT_n

CABLE_PRESENT_n std_logic := ' 0 '

Signal

CFLASH_SELn

CFLASH_SELn std_logic

Signal

CONTROL_ADR

CONTROL_ADR std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )

Signal

CONTROL_CLK

CONTROL_CLK std_logic := ' 0 '

Signal

CONTROL_CLK_period

CONTROL_CLK_period time := 10 ns

Constant

CONTROL_CSn

CONTROL_CSn std_logic := ' 1 '

Signal

CONTROL_ENAB

CONTROL_ENAB std_logic := ' 0 '

Signal

CONTROL_MISO

CONTROL_MISO std_logic

Signal

CONTROL_MOSI

CONTROL_MOSI std_logic := ' 0 '

Signal

CPLD_CLK

CPLD_CLK std_logic := ' 0 '

Signal

CPLD_CLK_period

CPLD_CLK_period time := 10 ns

Constant

D1FLASH_SELn

D1FLASH_SELn std_logic

Signal

D2FLASH_SELn

D2FLASH_SELn std_logic

Signal

FLASH_SPI_CLK

FLASH_SPI_CLK std_logic

Signal

FLASH_SPI_CSn

FLASH_SPI_CSn std_logic

Signal

FLASH_SPI_MISO

FLASH_SPI_MISO std_logic := ' 0 '

Signal

FLASH_SPI_MOSI

FLASH_SPI_MOSI std_logic

Signal

RPI_CE1N

RPI_CE1N std_logic := ' 0 '

Signal

RPI_GPIO5

RPI_GPIO5 std_logic := ' 0 '

Signal

RPI_GPIO6

RPI_GPIO6 std_logic := ' 0 '

Signal

RPI_MISO

RPI_MISO std_logic

Signal

RPI_ON

RPI_ON std_logic := ' 0 '

Signal

uut

uut FLASH_SPI

Instantiation

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The documentation for this class was generated from the following file:

• FTM/CPLDs/FLASH_SPI/FLASH_SPI_tb.vhd