rtl Architecture Reference

Processes
Delay_SM	( clock , timerSM , run_L1A , bcrst )
timer	( clock , run_L1A )

Constants
DELAYofZERO	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )

Types
timer_state	( WAITING , READMEM , TIMING , AGAIN , DONE )

Signals
timerSM	timer_state := WAITING
countdown	integer := 0
index	integer := 0
load	std_logic := ' 0 '
inc_index	std_logic := ' 0 '
Numberof_L1A	integer

Member Function Documentation

Delay_SM()

Delay_SM (   clock ,   timerSM ,   run_L1A ,   bcrst   )

Process

timer()

timer (   clock ,   run_L1A   )

Process

Member Data Documentation

countdown

countdown integer := 0

Signal

DELAYofZERO

DELAYofZERO std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )

Constant

inc_index

inc_index std_logic := ' 0 '

Signal

index

index integer := 0

Signal

load

load std_logic := ' 0 '

Signal

Numberof_L1A

Numberof_L1A integer

Signal

timer_state

timer_state ( WAITING , READMEM , TIMING , AGAIN , DONE )

Type

timerSM

timerSM timer_state := WAITING

Signal

---

The documentation for this class was generated from the following file:

• FTM/Control/hdl/L1A_Gen.vhd