My Project
v0.0.16
|
Processes | |
PROCESS_11 | ( clk_i , reset , enable ) |
PROCESS_12 | ( clk_i , reset ) |
Signals | |
ClockR | std_logic := ' 0 ' |
ClockF | std_logic := ' 0 ' |
|
Process |
|
Process |
|
Signal |
|
Signal |