rtl Architecture Reference

Processes
PROCESS_327	( sysclk_b )
PROCESS_328	( clk_ipb_b )
PROCESS_329	( clk_125_b )
PROCESS_551	( sysclk_b )
PROCESS_552	( clk_ipb_b )
PROCESS_553	( clk_125_b )
PROCESS_889	( sysclk_b )
PROCESS_890	( clk_ipb_b )
PROCESS_891	( clk_125_b )

Signals
clk_ipb_i	std_logic
clk_ipb_b	std_logic
clk_125_i	std_logic
clk_125_b	std_logic
sysclk_b	std_logic
d17	std_logic
d17_d	std_logic
dcm_locked	std_logic
nuke_i	std_logic := ' 0 '
nuke_d	std_logic := ' 0 '
nuke_d2	std_logic := ' 0 '
rst	std_logic := ' 1 '
rst_ipb	std_logic := ' 1 '
rst_125	std_logic := ' 1 '

Instantiations
ibufgds0	ibufg
bufg_125	bufg
bufg_ipb	bufg
dcm0	dcm_clkgen
clkdiv	clock_div <Entity clock_div>
ibufgds0	ibufg
bufg_125	bufg
bufg_ipb	bufg
dcm0	dcm_clkgen
clkdiv	clock_div <Entity clock_div>
ibufgds0	ibufg
bufg_125	bufg
bufg_ipb	bufg
dcm0	dcm_clkgen
clkdiv	clock_div <Entity clock_div>

Member Function Documentation

PROCESS_327()

PROCESS_327

(

sysclk_b

)

PROCESS_328()

PROCESS_328 (   clk_ipb_b   )

Process

PROCESS_329()

PROCESS_329 (   clk_125_b   )

Process

PROCESS_551()

PROCESS_551

(

sysclk_b

)

PROCESS_552()

PROCESS_552 (   clk_ipb_b   )

Process

PROCESS_553()

PROCESS_553 (   clk_125_b   )

Process

PROCESS_889()

PROCESS_889

(

sysclk_b

)

PROCESS_890()

PROCESS_890 (   clk_ipb_b   )

Process

PROCESS_891()

PROCESS_891 (   clk_125_b   )

Process

Member Data Documentation

bufg_125 [1/3]

bufg_125 bufg

Instantiation

bufg_125 [2/3]

bufg_125 bufg

Instantiation

bufg_125 [3/3]

bufg_125 bufg

Instantiation

bufg_ipb [1/3]

bufg_ipb bufg

Instantiation

bufg_ipb [2/3]

bufg_ipb bufg

Instantiation

bufg_ipb [3/3]

bufg_ipb bufg

Instantiation

clk_125_b

clk_125_b std_logic

Signal

clk_125_i

clk_125_i std_logic

Signal

clk_ipb_b

clk_ipb_b std_logic

Signal

clk_ipb_i

clk_ipb_i std_logic

Signal

clkdiv [1/3]

clkdiv clock_div

Instantiation

clkdiv [2/3]

clkdiv clock_div

Instantiation

clkdiv [3/3]

clkdiv clock_div

Instantiation

d17

d17 std_logic

Signal

d17_d

d17_d std_logic

Signal

dcm0 [1/3]

dcm0 dcm_clkgen

Instantiation

dcm0 [2/3]

dcm0 dcm_clkgen

Instantiation

dcm0 [3/3]

dcm0 dcm_clkgen

Instantiation

dcm_locked

dcm_locked std_logic

Signal

ibufgds0 [1/3]

ibufgds0 ibufg

Instantiation

ibufgds0 [2/3]

ibufgds0 ibufg

Instantiation

ibufgds0 [3/3]

ibufgds0 ibufg

Instantiation

nuke_d

nuke_d std_logic := ' 0 '

Signal

nuke_d2

nuke_d2 std_logic := ' 0 '

Signal

nuke_i

nuke_i std_logic := ' 0 '

Signal

rst

rst std_logic := ' 1 '

Signal

rst_125

rst_125 std_logic := ' 1 '

Signal

rst_ipb

rst_ipb std_logic := ' 1 '

Signal

sysclk_b

sysclk_b std_logic

Signal

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The documentation for this class was generated from the following file:

• components/ipbus_util/firmware/hdl/clocks_s6_extphy_100MHz.vhd