crc_add Entity Reference

Inheritance diagram for crc_add:

Entities
rtl	architecture

Libraries
ieee

Use Clauses
std_logic_1164

Generics
REVERSE_BIT_ORDER	boolean := false

Ports
clock	in std_logic
crc_en	in std_logic
crc_in	in std_logic_vector ( 8 downto 0 )
data_in	in std_logic_vector ( 31 downto 0 )
data_out	out std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )

Member Data Documentation

clock

clock in std_logic

Port

crc_en

crc_en in std_logic

Port

crc_in

crc_in in std_logic_vector ( 8 downto 0 )

Port

data_in

data_in in std_logic_vector ( 31 downto 0 )

Port

data_out

data_out out std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )

Port

ieee

ieee

Library

REVERSE_BIT_ORDER

REVERSE_BIT_ORDER boolean := false

Generic

std_logic_1164

std_logic_1164

Package

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The documentation for this class was generated from the following file:

• common/LatomeCRC/hdl/crc_add.vhd