eeprom_addr_reader Entity Reference

Inheritance diagram for eeprom_addr_reader:

Entities
Behavioral	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
NUMERIC_STD
math_real

Generics
ADDRESS_WORD	std_logic_vector ( 7 downto 0 ) := x " 00 "
N_WORDS	unsigned ( 7 downto 0 ) := x " 07 "

Ports
CLK	in STD_LOGIC
RESET	in STD_LOGIC
RETRIEVED_DATA	out std_logic_vector ( 63 downto 0 )
BUSY	out std_logic
IN_SCL	in std_logic := ' 0 '
IN_SDA_O	in std_logic := ' 0 '
IN_SDA_I	out std_logic
OUT_SCL	out std_logic
OUT_SDA_O	out std_logic
OUT_SDA_I	in std_logic := ' 0 '

Member Data Documentation

ADDRESS_WORD

ADDRESS_WORD std_logic_vector ( 7 downto 0 ) := x " 00 "

Generic

BUSY

BUSY out std_logic

Port

CLK

CLK in STD_LOGIC

Port

IEEE

IEEE

Library

IN_SCL

IN_SCL in std_logic := ' 0 '

Port

IN_SDA_I

IN_SDA_I out std_logic

Port

IN_SDA_O

IN_SDA_O in std_logic := ' 0 '

Port

math_real

math_real

Package

N_WORDS

N_WORDS unsigned ( 7 downto 0 ) := x " 07 "

Generic

NUMERIC_STD

NUMERIC_STD

Package

OUT_SCL

OUT_SCL out std_logic

Port

OUT_SDA_I

OUT_SDA_I in std_logic := ' 0 '

Port

OUT_SDA_O

OUT_SDA_O out std_logic

Port

RESET

RESET in STD_LOGIC

Port

RETRIEVED_DATA

RETRIEVED_DATA out std_logic_vector ( 63 downto 0 )

Port

STD_LOGIC_1164

STD_LOGIC_1164

Package

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The documentation for this class was generated from the following file:

• FTM/Control/hdl/eeprom_addr_reader.vhd