arch Architecture Reference

Processes
PROCESS_377	( clk , nReset )
PROCESS_378	( clk , nReset )
PROCESS_379	( clk , nReset )
PROCESS_939	( clk , nReset )
PROCESS_940	( clk , nReset )
PROCESS_941	( clk , nReset )

Constants
I2C_CMD_NOP	std_logic_vector ( 3 downto 0 ) := " 0000 "
I2C_CMD_START	std_logic_vector ( 3 downto 0 ) := " 0001 "
I2C_CMD_STOP	std_logic_vector ( 3 downto 0 ) := " 0010 "
I2C_CMD_WRITE	std_logic_vector ( 3 downto 0 ) := " 0100 "
I2C_CMD_READ	std_logic_vector ( 3 downto 0 ) := " 1000 "
ST_IDLE	std_logic_vector ( 4 downto 0 ) := " 00000 "
ST_START	std_logic_vector ( 4 downto 0 ) := " 00001 "
ST_READ	std_logic_vector ( 4 downto 0 ) := " 00010 "
ST_WRITE	std_logic_vector ( 4 downto 0 ) := " 00100 "
ST_ACK	std_logic_vector ( 4 downto 0 ) := " 01000 "
ST_STOP	std_logic_vector ( 4 downto 0 ) := " 10000 "

Signals
c_state	std_logic_vector ( 4 downto 0 )
go	std_logic
dcnt	std_logic_vector ( 2 downto 0 )
cnt_done	std_logic
sr	std_logic_vector ( 7 downto 0 )
shift	std_logic
ld	std_logic
cmd_ack_int	std_logic

Member Function Documentation

PROCESS_377()

PROCESS_377 (   clk ,   nReset   )

Process

PROCESS_378()

PROCESS_378 (   clk ,   nReset   )

Process

PROCESS_379()

PROCESS_379 (   clk ,   nReset   )

Process

PROCESS_939()

PROCESS_939 (   clk ,   nReset   )

Process

PROCESS_940()

PROCESS_940 (   clk ,   nReset   )

Process

PROCESS_941()

PROCESS_941 (   clk ,   nReset   )

Process

Member Data Documentation

c_state

c_state std_logic_vector ( 4 downto 0 )

Signal

cmd_ack_int

cmd_ack_int std_logic

Signal

cnt_done

cnt_done std_logic

Signal

dcnt

dcnt std_logic_vector ( 2 downto 0 )

Signal

go

go std_logic

Signal

I2C_CMD_NOP

I2C_CMD_NOP std_logic_vector ( 3 downto 0 ) := " 0000 "

Constant

I2C_CMD_READ

I2C_CMD_READ std_logic_vector ( 3 downto 0 ) := " 1000 "

Constant

I2C_CMD_START

I2C_CMD_START std_logic_vector ( 3 downto 0 ) := " 0001 "

Constant

I2C_CMD_STOP

I2C_CMD_STOP std_logic_vector ( 3 downto 0 ) := " 0010 "

Constant

I2C_CMD_WRITE

I2C_CMD_WRITE std_logic_vector ( 3 downto 0 ) := " 0100 "

Constant

ld

ld std_logic

Signal

shift

shift std_logic

Signal

sr

sr std_logic_vector ( 7 downto 0 )

Signal

ST_ACK

ST_ACK std_logic_vector ( 4 downto 0 ) := " 01000 "

Constant

ST_IDLE

ST_IDLE std_logic_vector ( 4 downto 0 ) := " 00000 "

Constant

ST_READ

ST_READ std_logic_vector ( 4 downto 0 ) := " 00010 "

Constant

ST_START

ST_START std_logic_vector ( 4 downto 0 ) := " 00001 "

Constant

ST_STOP

ST_STOP std_logic_vector ( 4 downto 0 ) := " 10000 "

Constant

ST_WRITE

ST_WRITE std_logic_vector ( 4 downto 0 ) := " 00100 "

Constant

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The documentation for this class was generated from the following file:

• components/opencores_i2c/firmware/hdl/i2c_master_byte_ctrl.vhd