rtl Architecture Reference

Processes
retime	( ttc_clk )

Signals
creg	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
preg	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
playback	std_logic := ' 0 '
link_latency	std_logic_vector ( 4 downto 0 )

Instantiations
control	playback_control <Entity playback_control>
bc_logic	playback_latency <Entity playback_latency>

Member Function Documentation

retime()

retime

(

ttc_clk

)

Member Data Documentation

bc_logic

bc_logic playback_latency

Instantiation

control

control playback_control

Instantiation

creg

creg std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )

Signal

link_latency

link_latency std_logic_vector ( 4 downto 0 )

Signal

playback

playback std_logic := ' 0 '

Signal

preg

preg std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )

Signal

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The documentation for this class was generated from the following file:

• common/DSS_buffer/hdl/ipbus_dss_buffer_control.vhd