My Project  v0.0.16
Constants | Signals | Instantiations
rtl Architecture Reference

Constants

BLOCK_WIDTH  integer := 13
NSLV  integer := 3

Signals

ipbw  ipb_wbus_array ( NSLV - 1 downto 0 )
ipbr  ipb_rbus_array ( NSLV - 1 downto 0 )
ipbr_d  ipb_rbus_array ( NSLV - 1 downto 0 )
mismatch  std_logic

Instantiations

fabric_decode  ipbus_fabric_branch <Entity ipbus_fabric_branch>
rx_spy  ipbus_data_sink <Entity ipbus_data_sink>
rx_check  ipbus_data_check <Entity ipbus_data_check>
rx_errors  ipbus_counter <Entity ipbus_counter>

Member Data Documentation

◆ BLOCK_WIDTH

BLOCK_WIDTH integer := 13
Constant

◆ fabric_decode

fabric_decode ipbus_fabric_branch
Instantiation

◆ ipbr

ipbr ipb_rbus_array ( NSLV - 1 downto 0 )
Signal

◆ ipbr_d

ipbr_d ipb_rbus_array ( NSLV - 1 downto 0 )
Signal

◆ ipbw

ipbw ipb_wbus_array ( NSLV - 1 downto 0 )
Signal

◆ mismatch

mismatch std_logic
Signal

◆ NSLV

NSLV integer := 3
Constant

◆ rx_check

rx_check ipbus_data_check
Instantiation

◆ rx_errors

rx_errors ipbus_counter
Instantiation

◆ rx_spy

rx_spy ipbus_data_sink
Instantiation

The documentation for this class was generated from the following file: