My Project
v0.0.16
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Entities | |
rtl | architecture |
Libraries | |
IEEE | |
UNISIM |
Use Clauses | |
STD_LOGIC_1164 | |
numeric_std | |
vcomponents | |
ipbus | Package <ipbus> |
ipbus_reg_types | Package <ipbus_reg_types> |
ftm | Package <ftm> |
Ports | |
ipb_clk | in std_logic |
ipb_rst | in std_logic |
ipb_in | in ipb_wbus |
ipb_out | out ipb_rbus |
ttc_clk | in std_logic |
sync_frame | in std_logic |
ttcinfo_clko | in std_logic |
ttcinfo_data | out mgt_data |
L1A_tx | in std_logic := ' 0 ' |
BCR_tx | in std_logic := ' 0 ' |
ECR_tx | in std_logic := ' 0 ' |
tx_shelf_num | in std_logic_vector ( 3 downto 0 ) |
ttcinfo_sink_clko | in std_logic |
ttcinfo_sink_data | in mgt_data |
L1A_rx | out std_logic |
BCR_rx | out std_logic |
ECR_rx | out std_logic |
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