My Project  v0.0.16
Signals | Processes | Instantiations
rtl Architecture Reference

Processes

PROCESS_365  ( clk )
PROCESS_366  ( clk )
PROCESS_927  ( clk )
PROCESS_928  ( clk )

Signals

d17  std_logic
d17_d  std_logic
s  std_logic
sd  std_logic
e  std_logic
e_d  std_logic
sl  std_logic
scnt  unsigned ( 6 downto 0 )

Instantiations

clkdiv  ipbus_clock_div <Entity ipbus_clock_div>
clkdiv  ipbus_clock_div <Entity ipbus_clock_div>

Member Function Documentation

◆ PROCESS_365()

PROCESS_365 (   clk)

◆ PROCESS_366()

PROCESS_366 (   clk  
)
Process

◆ PROCESS_927()

PROCESS_927 (   clk)

◆ PROCESS_928()

PROCESS_928 (   clk  
)
Process

Member Data Documentation

◆ clkdiv [1/2]

clkdiv ipbus_clock_div
Instantiation

◆ clkdiv [2/2]

clkdiv ipbus_clock_div
Instantiation

◆ d17

d17 std_logic
Signal

◆ d17_d

d17_d std_logic
Signal

◆ e

e std_logic
Signal

◆ e_d

e_d std_logic
Signal

◆ s

s std_logic
Signal

◆ scnt

scnt unsigned ( 6 downto 0 )
Signal

◆ sd

sd std_logic
Signal

◆ sl

sl std_logic
Signal

The documentation for this class was generated from the following file: