My Project  v0.0.16
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mp7_infra Entity Reference
Inheritance diagram for mp7_infra:
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Collaboration diagram for mp7_infra:
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Entities

rtl  architecture
 

Libraries

IEEE 

Use Clauses

STD_LOGIC_1164 
ipbus  Package <ipbus>
ipbus_trans_decl  Package <ipbus_trans_decl>
ipbus_decode_mp7_infra 

Generics

MAC_ADDR  std_logic_vector ( 47 downto 0 ) := X " 080030f30385 "
IP_ADDR  std_logic_vector ( 31 downto 0 ) := X " c0A80163 "

Ports

gt_clkp   in std_logic
gt_clkn   in std_logic
gt_txp   out std_logic
gt_txn   out std_logic
gt_rxp   in std_logic
gt_rxn   in std_logic
leds   out std_logic_vector ( 11 downto 0 )
clk_ipb   out std_logic
rst_ipb   out std_logic
clk40ish   out std_logic
clk_fr   out std_logic
rst_fr   out std_logic
nuke   in std_logic
soft_rst   in std_logic
oc_flag   in std_logic
ec_flag   in std_logic
ipb_in_ctrl   in ipb_rbus
ipb_out_ctrl   out ipb_wbus
ipb_in_ttc   in ipb_rbus
ipb_out_ttc   out ipb_wbus
ipb_in_datapath   in ipb_rbus
ipb_out_datapath   out ipb_wbus
ipb_in_readout   in ipb_rbus
ipb_out_readout   out ipb_wbus
ipb_in_payload   in ipb_rbus
ipb_out_payload   out ipb_wbus
ipb_in_formatter   in ipb_rbus
ipb_out_formatter   out ipb_wbus

Member Data Documentation

◆ clk40ish

clk40ish out std_logic
Port

◆ clk_fr

clk_fr out std_logic
Port

◆ clk_ipb

clk_ipb out std_logic
Port

◆ ec_flag

ec_flag in std_logic
Port

◆ gt_clkn

gt_clkn in std_logic
Port

◆ gt_clkp

gt_clkp in std_logic
Port

◆ gt_rxn

gt_rxn in std_logic
Port

◆ gt_rxp

gt_rxp in std_logic
Port

◆ gt_txn

gt_txn out std_logic
Port

◆ gt_txp

gt_txp out std_logic
Port

◆ IEEE

IEEE
Library

◆ IP_ADDR

IP_ADDR std_logic_vector ( 31 downto 0 ) := X " c0A80163 "
Generic

◆ ipb_in_ctrl

◆ ipb_in_datapath

◆ ipb_in_formatter

◆ ipb_in_payload

◆ ipb_in_readout

◆ ipb_in_ttc

◆ ipb_out_ctrl

◆ ipb_out_datapath

◆ ipb_out_formatter

◆ ipb_out_payload

◆ ipb_out_readout

◆ ipb_out_ttc

◆ ipbus

ipbus
Package

◆ ipbus_decode_mp7_infra

◆ ipbus_trans_decl

◆ leds

leds out std_logic_vector ( 11 downto 0 )
Port

◆ MAC_ADDR

MAC_ADDR std_logic_vector ( 47 downto 0 ) := X " 080030f30385 "
Generic

◆ nuke

nuke in std_logic
Port

◆ oc_flag

oc_flag in std_logic
Port

◆ rst_fr

rst_fr out std_logic
Port

◆ rst_ipb

rst_ipb out std_logic
Port

◆ soft_rst

soft_rst in std_logic
Port

◆ STD_LOGIC_1164

STD_LOGIC_1164
Package

The documentation for this class was generated from the following file: