sync_block Entity Reference

Inheritance diagram for sync_block:

Entities
structural	architecture

Libraries
ieee
unisim

Use Clauses
std_logic_1164
vcomponents

Generics
INITIALISE	bit_vector ( 1 downto 0 ) := " 00 "

Ports
clk	in std_logic
data_in	in std_logic
data_out	out std_logic

Member Data Documentation

clk

clk in std_logic

Port

data_in

data_in in std_logic

Port

data_out

data_out out std_logic

Port

ieee

ieee

Library

INITIALISE

INITIALISE bit_vector ( 1 downto 0 ) := " 00 "

Generic

std_logic_1164

std_logic_1164

Package

unisim

unisim

Library

vcomponents

vcomponents

Package

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The documentation for this class was generated from the following file:

• components/ipbus_eth/firmware/gen_hdl/v6_emac_v2_3_basex/sync_block.vhd