My Project  v0.0.16
Generics | Ports | Libraries | Use Clauses
trans_arb Entity Reference
Inheritance diagram for trans_arb:
Inheritance graph
[legend]

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 
ipbus_trans_decl  Package <ipbus_trans_decl>

Generics

NSRC  positive

Ports

clk   in std_logic
rst   in std_logic
buf_in   in ipbus_trans_in_array ( NSRC - 1 downto 0 )
buf_out   out ipbus_trans_out_array ( NSRC - 1 downto 0 )
trans_out   out ipbus_trans_in
trans_in   in ipbus_trans_out
pkt   out std_logic_vector ( NSRC - 1 downto 0 )

Member Data Documentation

◆ buf_in

buf_in in ipbus_trans_in_array ( NSRC - 1 downto 0 )
Port

◆ buf_out

buf_out out ipbus_trans_out_array ( NSRC - 1 downto 0 )
Port

◆ clk

clk in std_logic
Port

◆ ieee

ieee
Library

◆ ipbus_trans_decl

◆ NSRC

NSRC positive
Generic

◆ numeric_std

numeric_std
Package

◆ pkt

pkt out std_logic_vector ( NSRC - 1 downto 0 )
Port

◆ rst

rst in std_logic
Port

◆ std_logic_1164

std_logic_1164
Package

◆ trans_in

◆ trans_out


The documentation for this class was generated from the following file: