My Project
v0.0.16
|
Processes | |
PROCESS_41 | ( clk ) |
PROCESS_56 | ( clk ) |
PROCESS_593 | ( clk ) |
Signals | |
src | unsigned ( 1 downto 0 ) |
sel | integer range 0 to NSRC - 1 := 0 |
busy | std_logic |
|
Process |
|
Process |
|
Process |
|
Signal |
|
Signal |