My Project  v0.0.16
Components | Signals | Attributes | Processes | Instantiations
rtl Architecture Reference

Processes

PROCESS_302  ( clk_m )
PROCESS_303  ( clk_m )
PROCESS_304  ( clk_ipb )
PROCESS_305  ( clk_m )
PROCESS_306  ( clk_ipb )
PROCESS_307  ( clk_m )
PROCESS_862  ( clk_m )
PROCESS_863  ( clk_m )
PROCESS_864  ( clk_ipb )
PROCESS_865  ( clk_m )
PROCESS_866  ( clk_ipb )
PROCESS_867  ( clk_m )

Components

sdpram_16x10_32x9  <Entity sdpram_16x10_32x9>
sdpram_32x9_16x10  <Entity sdpram_32x9_16x10>

Signals

req_d  std_logic
mode  std_logic
mode_fall_edge  std_logic
done_m  std_logic
done_m_s  std_logic
mode_ipb  std_logic
mode_ipb_s  std_logic
mode_ipb_d  std_logic
rdy  std_logic
done_catch  std_logic
addr  unsigned ( 9 downto 0 )
addr_sl  std_logic_vector ( 9 downto 0 )
we_in  std_logic_vector ( 0 downto 0 )
we_out  std_logic_vector ( 0 downto 0 )

Attributes

KEEP  string
KEEP  done_m_s : signal is " TRUE "
KEEP  mode_ipb_s : signal is " TRUE "

Instantiations

ram_in  sdpram_16x10_32x9 <Entity sdpram_16x10_32x9>
ram_out  sdpram_32x9_16x10 <Entity sdpram_32x9_16x10>
ram_in  sdpram_16x10_32x9 <Entity sdpram_16x10_32x9>
ram_out  sdpram_32x9_16x10 <Entity sdpram_32x9_16x10>

Member Function Documentation

◆ PROCESS_302()

PROCESS_302 (   clk_m  
)
Process

◆ PROCESS_303()

PROCESS_303 (   clk_m  
)
Process

◆ PROCESS_304()

PROCESS_304 (   clk_ipb  
)
Process

◆ PROCESS_305()

PROCESS_305 (   clk_m  
)
Process

◆ PROCESS_306()

PROCESS_306 (   clk_ipb  
)
Process

◆ PROCESS_307()

PROCESS_307 (   clk_m  
)
Process

◆ PROCESS_862()

PROCESS_862 (   clk_m  
)
Process

◆ PROCESS_863()

PROCESS_863 (   clk_m  
)
Process

◆ PROCESS_864()

PROCESS_864 (   clk_ipb  
)
Process

◆ PROCESS_865()

PROCESS_865 (   clk_m  
)
Process

◆ PROCESS_866()

PROCESS_866 (   clk_ipb  
)
Process

◆ PROCESS_867()

PROCESS_867 (   clk_m  
)
Process

Member Data Documentation

◆ addr

addr unsigned ( 9 downto 0 )
Signal

◆ addr_sl

addr_sl std_logic_vector ( 9 downto 0 )
Signal

◆ done_catch

done_catch std_logic
Signal

◆ done_m

done_m std_logic
Signal

◆ done_m_s

done_m_s std_logic
Signal

◆ KEEP [1/3]

KEEP string
Attribute

◆ KEEP [2/3]

KEEP done_m_s : signal is " TRUE "
Attribute

◆ KEEP [3/3]

KEEP mode_ipb_s : signal is " TRUE "
Attribute

◆ mode

mode std_logic
Signal

◆ mode_fall_edge

mode_fall_edge std_logic
Signal

◆ mode_ipb

mode_ipb std_logic
Signal

◆ mode_ipb_d

mode_ipb_d std_logic
Signal

◆ mode_ipb_s

mode_ipb_s std_logic
Signal

◆ ram_in [1/2]

ram_in sdpram_16x10_32x9
Instantiation

◆ ram_in [2/2]

ram_in sdpram_16x10_32x9
Instantiation

◆ ram_out [1/2]

ram_out sdpram_32x9_16x10
Instantiation

◆ ram_out [2/2]

ram_out sdpram_32x9_16x10
Instantiation

◆ rdy

rdy std_logic
Signal

◆ req_d

req_d std_logic
Signal

◆ sdpram_16x10_32x9

sdpram_16x10_32x9
Component

◆ sdpram_32x9_16x10

sdpram_32x9_16x10
Component

◆ we_in

we_in std_logic_vector ( 0 downto 0 )
Signal

◆ we_out

we_out std_logic_vector ( 0 downto 0 )
Signal
The documentation for this class was generated from the following file:
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