rtl Architecture Reference

Signals
ctrl	ipb_reg_v ( 0 downto 0 )
stat	ipb_reg_v ( 0 downto 0 )
stb	std_logic_vector ( 0 downto 0 )

Instantiations
reg	ipbus_syncreg_v <Entity ipbus_syncreg_v>
reg	ipbus_syncreg_v <Entity ipbus_syncreg_v>

Member Data Documentation

ctrl

ctrl ipb_reg_v ( 0 downto 0 )

Signal

reg [1/2]

reg ipbus_syncreg_v

Instantiation

reg [2/2]

reg ipbus_syncreg_v

Instantiation

stat

stat ipb_reg_v ( 0 downto 0 )

Signal

stb

stb std_logic_vector ( 0 downto 0 )

Signal

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The documentation for this class was generated from the following file:

• components/ipbus_slaves/firmware/hdl/trans_buffer_test.vhd