My Project  v0.0.16
Ports | Libraries | Use Clauses
ttcinfo_sink Entity Reference
Inheritance diagram for ttcinfo_sink:
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Collaboration diagram for ttcinfo_sink:
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Entities

rtl  architecture
 

Libraries

IEEE 
UNISIM 

Use Clauses

STD_LOGIC_1164 
numeric_std 
vcomponents 
ftm  Package <ftm>

Ports

data_clk   in std_logic
data_in   in mgt_data
ttc_clk   in std_logic
crc_ignore   in std_logic
mgt_rx_ok   in std_logic := ' 1 '
ttc_tune   in std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
L1A   out std_logic
BCR   out std_logic
ECR   out std_logic
crc_error   out std_logic := ' 0 '

Member Data Documentation

◆ BCR

BCR out std_logic
Port

◆ crc_error

crc_error out std_logic := ' 0 '
Port

◆ crc_ignore

crc_ignore in std_logic
Port

◆ data_clk

data_clk in std_logic
Port

◆ data_in

data_in in mgt_data
Port

◆ ECR

ECR out std_logic
Port

◆ ftm

ftm
Package

◆ IEEE

IEEE
Library

◆ L1A

L1A out std_logic
Port

◆ mgt_rx_ok

mgt_rx_ok in std_logic := ' 1 '
Port

◆ numeric_std

numeric_std
Package

◆ STD_LOGIC_1164

STD_LOGIC_1164
Package

◆ ttc_clk

ttc_clk in std_logic
Port

◆ ttc_tune

ttc_tune in std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
Port

◆ UNISIM

UNISIM
Library

◆ vcomponents

vcomponents
Package

The documentation for this class was generated from the following file: