My Project
v0.0.16
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Entities | |
rtl | architecture |
Libraries | |
IEEE | |
UNISIM |
Use Clauses | |
STD_LOGIC_1164 | |
numeric_std | |
ipbus | Package <ipbus> |
ipbus_trans_decl | Package <ipbus_trans_decl> |
VComponents |
Ports | |
clk | in std_logic |
rst | in std_logic |
ipbus_in | in ipb_wbus |
ipbus_out | out ipb_rbus |
sclk | in std_logic |
uc_pipe_nrd | in std_logic |
uc_pipe_nwe | in std_logic |
uc_pipe | inout std_logic_vector ( 15 downto 0 ) |
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