udp_DualPortRAM Entity Reference

Inheritance diagram for udp_DualPortRAM:

Entities
initial	architecture

Libraries
ieee

Use Clauses
std_logic_1164
numeric_std

Generics
BUFWIDTH	natural := 0
ADDRWIDTH	natural := 0

Ports
ClkA	in std_logic
ClkB	in std_logic
wea	in std_logic
addra	in std_logic_vector ( BUFWIDTH + ADDRWIDTH - 1 downto 0 )
addrb	in std_logic_vector ( BUFWIDTH + ADDRWIDTH - 1 downto 0 )
dia	in std_logic_vector ( 7 downto 0 )
dob	out std_logic_vector ( 7 downto 0 )

Member Data Documentation

addra

addra in std_logic_vector ( BUFWIDTH + ADDRWIDTH - 1 downto 0 )

Port

addrb

addrb in std_logic_vector ( BUFWIDTH + ADDRWIDTH - 1 downto 0 )

Port

ADDRWIDTH

ADDRWIDTH natural := 0

Generic

BUFWIDTH

BUFWIDTH natural := 0

Generic

ClkA

ClkA in std_logic

Port

ClkB

ClkB in std_logic

Port

dia

dia in std_logic_vector ( 7 downto 0 )

Port

dob

dob out std_logic_vector ( 7 downto 0 )

Port

ieee

ieee

Library

numeric_std

numeric_std

Package

std_logic_1164

std_logic_1164

Package

wea

wea in std_logic

Port

---

The documentation for this class was generated from the following file:

• components/ipbus_core/firmware/hdl/udp_dualportram.vhd