My Project  v0.0.16
Signals | Processes
rtl Architecture Reference

Processes

send_packet  ( mac_clk )
set_address_block  ( mac_clk )
build_packet  ( mac_clk )
do_cksum  ( mac_clk )
next_addr_block  ( mac_clk )
address_block  ( mac_clk )
byteswap_block  ( mac_clk )
write_data  ( mac_clk )
do_ipbus_hdr  ( mac_clk )
send_packet  ( mac_clk )
set_address_block  ( mac_clk )
build_packet  ( mac_clk )
do_cksum  ( mac_clk )
next_addr_block  ( mac_clk )
address_block  ( mac_clk )
byteswap_block  ( mac_clk )
write_data  ( mac_clk )
do_ipbus_hdr  ( mac_clk )
send_packet  ( mac_clk )
set_address_block  ( mac_clk )
build_packet  ( mac_clk )
do_cksum  ( mac_clk )
next_addr_block  ( mac_clk )
address_block  ( mac_clk )
byteswap_block  ( mac_clk )
write_data  ( mac_clk )
do_ipbus_hdr  ( mac_clk )

Signals

payload_we_sig  std_logic
set_addr  std_logic
send_pending  std_logic
good_packet  std_logic
send_buf  std_logic
load_buf  std_logic
low_addr  std_logic
next_low  std_logic
byteswap  std_logic
buf_to_load  std_logic_vector ( 15 downto 0 )
address  unsigned ( 12 downto 0 )
addr_to_set  unsigned ( 12 downto 0 )
next_addr  unsigned ( 12 downto 0 )
payload_data_sig  std_logic_vector ( 7 downto 0 )

Member Function Documentation

◆ address_block() [1/3]

address_block (   mac_clk  
)
Process

◆ address_block() [2/3]

address_block (   mac_clk  
)
Process

◆ address_block() [3/3]

address_block (   mac_clk  
)
Process

◆ build_packet() [1/3]

build_packet (   mac_clk  
)
Process

◆ build_packet() [2/3]

build_packet (   mac_clk  
)
Process

◆ build_packet() [3/3]

build_packet (   mac_clk  
)
Process

◆ byteswap_block() [1/3]

byteswap_block (   mac_clk  
)
Process

◆ byteswap_block() [2/3]

byteswap_block (   mac_clk  
)
Process

◆ byteswap_block() [3/3]

byteswap_block (   mac_clk  
)
Process

◆ do_cksum() [1/3]

do_cksum (   mac_clk  
)
Process

◆ do_cksum() [2/3]

do_cksum (   mac_clk  
)
Process

◆ do_cksum() [3/3]

do_cksum (   mac_clk  
)
Process

◆ do_ipbus_hdr() [1/3]

do_ipbus_hdr (   mac_clk  
)
Process

◆ do_ipbus_hdr() [2/3]

do_ipbus_hdr (   mac_clk  
)
Process

◆ do_ipbus_hdr() [3/3]

do_ipbus_hdr (   mac_clk  
)
Process

◆ next_addr_block() [1/3]

next_addr_block (   mac_clk  
)
Process

◆ next_addr_block() [2/3]

next_addr_block (   mac_clk  
)
Process

◆ next_addr_block() [3/3]

next_addr_block (   mac_clk  
)
Process

◆ send_packet() [1/3]

send_packet (   mac_clk  
)
Process

◆ send_packet() [2/3]

send_packet (   mac_clk  
)
Process

◆ send_packet() [3/3]

send_packet (   mac_clk  
)
Process

◆ set_address_block() [1/3]

set_address_block (   mac_clk  
)
Process

◆ set_address_block() [2/3]

set_address_block (   mac_clk  
)
Process

◆ set_address_block() [3/3]

set_address_block (   mac_clk  
)
Process

◆ write_data() [1/3]

write_data (   mac_clk  
)
Process

◆ write_data() [2/3]

write_data (   mac_clk  
)
Process

◆ write_data() [3/3]

write_data (   mac_clk  
)
Process

Member Data Documentation

◆ addr_to_set

addr_to_set unsigned ( 12 downto 0 )
Signal

◆ address

address unsigned ( 12 downto 0 )
Signal

◆ buf_to_load

buf_to_load std_logic_vector ( 15 downto 0 )
Signal

◆ byteswap

byteswap std_logic
Signal

◆ good_packet

good_packet std_logic
Signal

◆ load_buf

load_buf std_logic
Signal

◆ low_addr

low_addr std_logic
Signal

◆ next_addr

next_addr unsigned ( 12 downto 0 )
Signal

◆ next_low

next_low std_logic
Signal

◆ payload_data_sig

payload_data_sig std_logic_vector ( 7 downto 0 )
Signal

◆ payload_we_sig

payload_we_sig std_logic
Signal

◆ send_buf

send_buf std_logic
Signal

◆ send_pending

send_pending std_logic
Signal

◆ set_addr

set_addr std_logic
Signal
The documentation for this class was generated from the following file:
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