My Project  v0.0.16
Attributes | Constants | Signals | Instantiations
WRAPPER Architecture Reference
Collaboration diagram for WRAPPER:
Collaboration graph
[legend]

Constants

EMAC0_PHYRESET  boolean := FALSE
EMAC0_PHYINITAUTONEG_ENABLE  boolean := FALSE
EMAC0_PHYISOLATE  boolean := FALSE
EMAC0_PHYPOWERDOWN  boolean := FALSE
EMAC0_PHYLOOPBACKMSB  boolean := FALSE
EMAC0_CONFIGVEC_79  boolean := TRUE
EMAC0_GTLOOPBACK  boolean := FALSE
EMAC0_UNIDIRECTION_ENABLE  boolean := FALSE
EMAC0_LINKTIMERVAL  bit_vector := x " 13D "
EMAC0_MDIO_ENABLE  boolean := TRUE
EMAC0_SPEED_LSB  boolean := FALSE
EMAC0_SPEED_MSB  boolean := TRUE
EMAC0_USECLKEN  boolean := FALSE
EMAC0_BYTEPHY  boolean := FALSE
EMAC0_RGMII_ENABLE  boolean := FALSE
EMAC0_SGMII_ENABLE  boolean := FALSE
EMAC0_1000BASEX_ENABLE  boolean := TRUE
EMAC0_HOST_ENABLE  boolean := FALSE
EMAC0_TX16BITCLIENT_ENABLE  boolean := FALSE
EMAC0_RX16BITCLIENT_ENABLE  boolean := FALSE
EMAC0_ADDRFILTER_ENABLE  boolean := FALSE
EMAC0_LTCHECK_DISABLE  boolean := FALSE
EMAC0_RXFLOWCTRL_ENABLE  boolean := FALSE
EMAC0_TXFLOWCTRL_ENABLE  boolean := FALSE
EMAC0_TXRESET  boolean := FALSE
EMAC0_TXJUMBOFRAME_ENABLE  boolean := FALSE
EMAC0_TXINBANDFCS_ENABLE  boolean := FALSE
EMAC0_TX_ENABLE  boolean := TRUE
EMAC0_TXVLAN_ENABLE  boolean := FALSE
EMAC0_TXHALFDUPLEX  boolean := FALSE
EMAC0_TXIFGADJUST_ENABLE  boolean := FALSE
EMAC0_RXRESET  boolean := FALSE
EMAC0_RXJUMBOFRAME_ENABLE  boolean := FALSE
EMAC0_RXINBANDFCS_ENABLE  boolean := FALSE
EMAC0_RX_ENABLE  boolean := TRUE
EMAC0_RXVLAN_ENABLE  boolean := FALSE
EMAC0_RXHALFDUPLEX  boolean := FALSE
EMAC0_PAUSEADDR  bit_vector := x " FFEEDDCCBBAA "
EMAC0_UNICASTADDR  bit_vector := x " 000000000000 "
EMAC0_DCRBASEADDR  bit_vector := X " 00 "

Signals

gnd_v48_i  std_logic_vector ( 47 downto 0 )
client_rx_data_0_i  std_logic_vector ( 15 downto 0 )
client_tx_data_0_i  std_logic_vector ( 15 downto 0 )
client_tx_data_valid_0_i  std_logic
client_tx_data_valid_msb_0_i  std_logic

Attributes

X_CORE_INFO  string
X_CORE_INFO  WRAPPER : architecture is " v5_emac_v1_8 , Coregen 13.1 "
CORE_GENERATION_INFO  string
CORE_GENERATION_INFO  WRAPPER : architecture is " v5_emac_v1_8_serdes , v5_emac_v1_8 , {c_emac0 = true , c_emac1 = false , c_has_mii_emac0 = false , c_has_mii_emac1 = false , c_has_gmii_emac0 = false , c_has_gmii_emac1 = true , c_has_rgmii_v1_3_emac0 = false , c_has_rgmii_v1_3_emac1 = false , c_has_rgmii_v2_0_emac0 = false , c_has_rgmii_v2_0_emac1 = false , c_has_sgmii_emac0 = false , c_has_sgmii_emac1 = false , c_has_gpcs_emac0 = true , c_has_gpcs_emac1 = false , c_tri_speed_emac0 = false , c_tri_speed_emac1 = false , c_speed_10_emac0 = false , c_speed_10_emac1 = false , c_speed_100_emac0 = false , c_speed_100_emac1 = false , c_speed_1000_emac0 = true , c_speed_1000_emac1 = true , c_has_host = false , c_has_dcr = false , c_has_mdio_emac0 = false , c_has_mdio_emac1 = false , c_client_16_emac0 = false , c_client_16_emac1 = false , c_add_filter_emac0 = false , c_add_filter_emac1 = false , c_has_clock_enable_emac0 = false , c_has_clock_enable_emac1 = false , } "

Instantiations

v5_emac  temac
v5_emac  temac

Member Data Documentation

◆ client_rx_data_0_i

client_rx_data_0_i std_logic_vector ( 15 downto 0 )
Signal

◆ client_tx_data_0_i

client_tx_data_0_i std_logic_vector ( 15 downto 0 )
Signal

◆ client_tx_data_valid_0_i

client_tx_data_valid_0_i std_logic
Signal

◆ client_tx_data_valid_msb_0_i

client_tx_data_valid_msb_0_i std_logic
Signal

◆ CORE_GENERATION_INFO [1/2]

CORE_GENERATION_INFO string
Attribute

◆ CORE_GENERATION_INFO [2/2]

CORE_GENERATION_INFO WRAPPER : architecture is " v5_emac_v1_8_serdes , v5_emac_v1_8 , {c_emac0 = true , c_emac1 = false , c_has_mii_emac0 = false , c_has_mii_emac1 = false , c_has_gmii_emac0 = false , c_has_gmii_emac1 = true , c_has_rgmii_v1_3_emac0 = false , c_has_rgmii_v1_3_emac1 = false , c_has_rgmii_v2_0_emac0 = false , c_has_rgmii_v2_0_emac1 = false , c_has_sgmii_emac0 = false , c_has_sgmii_emac1 = false , c_has_gpcs_emac0 = true , c_has_gpcs_emac1 = false , c_tri_speed_emac0 = false , c_tri_speed_emac1 = false , c_speed_10_emac0 = false , c_speed_10_emac1 = false , c_speed_100_emac0 = false , c_speed_100_emac1 = false , c_speed_1000_emac0 = true , c_speed_1000_emac1 = true , c_has_host = false , c_has_dcr = false , c_has_mdio_emac0 = false , c_has_mdio_emac1 = false , c_client_16_emac0 = false , c_client_16_emac1 = false , c_add_filter_emac0 = false , c_add_filter_emac1 = false , c_has_clock_enable_emac0 = false , c_has_clock_enable_emac1 = false , } "
Attribute

◆ EMAC0_1000BASEX_ENABLE

EMAC0_1000BASEX_ENABLE boolean := TRUE
Constant

◆ EMAC0_ADDRFILTER_ENABLE

EMAC0_ADDRFILTER_ENABLE boolean := FALSE
Constant

◆ EMAC0_BYTEPHY

EMAC0_BYTEPHY boolean := FALSE
Constant

◆ EMAC0_CONFIGVEC_79

EMAC0_CONFIGVEC_79 boolean := TRUE
Constant

◆ EMAC0_DCRBASEADDR

EMAC0_DCRBASEADDR bit_vector := X " 00 "
Constant

◆ EMAC0_GTLOOPBACK

EMAC0_GTLOOPBACK boolean := FALSE
Constant

◆ EMAC0_HOST_ENABLE

EMAC0_HOST_ENABLE boolean := FALSE
Constant

◆ EMAC0_LINKTIMERVAL

EMAC0_LINKTIMERVAL bit_vector := x " 13D "
Constant

◆ EMAC0_LTCHECK_DISABLE

EMAC0_LTCHECK_DISABLE boolean := FALSE
Constant

◆ EMAC0_MDIO_ENABLE

EMAC0_MDIO_ENABLE boolean := TRUE
Constant

◆ EMAC0_PAUSEADDR

EMAC0_PAUSEADDR bit_vector := x " FFEEDDCCBBAA "
Constant

◆ EMAC0_PHYINITAUTONEG_ENABLE

EMAC0_PHYINITAUTONEG_ENABLE boolean := FALSE
Constant

◆ EMAC0_PHYISOLATE

EMAC0_PHYISOLATE boolean := FALSE
Constant

◆ EMAC0_PHYLOOPBACKMSB

EMAC0_PHYLOOPBACKMSB boolean := FALSE
Constant

◆ EMAC0_PHYPOWERDOWN

EMAC0_PHYPOWERDOWN boolean := FALSE
Constant

◆ EMAC0_PHYRESET

EMAC0_PHYRESET boolean := FALSE
Constant

◆ EMAC0_RGMII_ENABLE

EMAC0_RGMII_ENABLE boolean := FALSE
Constant

◆ EMAC0_RX16BITCLIENT_ENABLE

EMAC0_RX16BITCLIENT_ENABLE boolean := FALSE
Constant

◆ EMAC0_RX_ENABLE

EMAC0_RX_ENABLE boolean := TRUE
Constant

◆ EMAC0_RXFLOWCTRL_ENABLE

EMAC0_RXFLOWCTRL_ENABLE boolean := FALSE
Constant

◆ EMAC0_RXHALFDUPLEX

EMAC0_RXHALFDUPLEX boolean := FALSE
Constant

◆ EMAC0_RXINBANDFCS_ENABLE

EMAC0_RXINBANDFCS_ENABLE boolean := FALSE
Constant

◆ EMAC0_RXJUMBOFRAME_ENABLE

EMAC0_RXJUMBOFRAME_ENABLE boolean := FALSE
Constant

◆ EMAC0_RXRESET

EMAC0_RXRESET boolean := FALSE
Constant

◆ EMAC0_RXVLAN_ENABLE

EMAC0_RXVLAN_ENABLE boolean := FALSE
Constant

◆ EMAC0_SGMII_ENABLE

EMAC0_SGMII_ENABLE boolean := FALSE
Constant

◆ EMAC0_SPEED_LSB

EMAC0_SPEED_LSB boolean := FALSE
Constant

◆ EMAC0_SPEED_MSB

EMAC0_SPEED_MSB boolean := TRUE
Constant

◆ EMAC0_TX16BITCLIENT_ENABLE

EMAC0_TX16BITCLIENT_ENABLE boolean := FALSE
Constant

◆ EMAC0_TX_ENABLE

EMAC0_TX_ENABLE boolean := TRUE
Constant

◆ EMAC0_TXFLOWCTRL_ENABLE

EMAC0_TXFLOWCTRL_ENABLE boolean := FALSE
Constant

◆ EMAC0_TXHALFDUPLEX

EMAC0_TXHALFDUPLEX boolean := FALSE
Constant

◆ EMAC0_TXIFGADJUST_ENABLE

EMAC0_TXIFGADJUST_ENABLE boolean := FALSE
Constant

◆ EMAC0_TXINBANDFCS_ENABLE

EMAC0_TXINBANDFCS_ENABLE boolean := FALSE
Constant

◆ EMAC0_TXJUMBOFRAME_ENABLE

EMAC0_TXJUMBOFRAME_ENABLE boolean := FALSE
Constant

◆ EMAC0_TXRESET

EMAC0_TXRESET boolean := FALSE
Constant

◆ EMAC0_TXVLAN_ENABLE

EMAC0_TXVLAN_ENABLE boolean := FALSE
Constant

◆ EMAC0_UNICASTADDR

EMAC0_UNICASTADDR bit_vector := x " 000000000000 "
Constant

◆ EMAC0_UNIDIRECTION_ENABLE

EMAC0_UNIDIRECTION_ENABLE boolean := FALSE
Constant

◆ EMAC0_USECLKEN

EMAC0_USECLKEN boolean := FALSE
Constant

◆ gnd_v48_i

gnd_v48_i std_logic_vector ( 47 downto 0 )
Signal

◆ v5_emac [1/2]

v5_emac temac
Instantiation

◆ v5_emac [2/2]

v5_emac temac
Instantiation

◆ X_CORE_INFO [1/2]

X_CORE_INFO string
Attribute

◆ X_CORE_INFO [2/2]

X_CORE_INFO WRAPPER : architecture is " v5_emac_v1_8 , Coregen 13.1 "
Attribute

The documentation for this class was generated from the following file: