My Project
v0.0.16
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Constants | |
EMAC0_PHYRESET | boolean := FALSE |
EMAC0_PHYINITAUTONEG_ENABLE | boolean := FALSE |
EMAC0_PHYISOLATE | boolean := FALSE |
EMAC0_PHYPOWERDOWN | boolean := FALSE |
EMAC0_PHYLOOPBACKMSB | boolean := FALSE |
EMAC0_CONFIGVEC_79 | boolean := TRUE |
EMAC0_GTLOOPBACK | boolean := FALSE |
EMAC0_UNIDIRECTION_ENABLE | boolean := FALSE |
EMAC0_LINKTIMERVAL | bit_vector := x " 13D " |
EMAC0_MDIO_ENABLE | boolean := TRUE |
EMAC0_SPEED_LSB | boolean := FALSE |
EMAC0_SPEED_MSB | boolean := TRUE |
EMAC0_USECLKEN | boolean := FALSE |
EMAC0_BYTEPHY | boolean := FALSE |
EMAC0_RGMII_ENABLE | boolean := FALSE |
EMAC0_SGMII_ENABLE | boolean := FALSE |
EMAC0_1000BASEX_ENABLE | boolean := TRUE |
EMAC0_HOST_ENABLE | boolean := FALSE |
EMAC0_TX16BITCLIENT_ENABLE | boolean := FALSE |
EMAC0_RX16BITCLIENT_ENABLE | boolean := FALSE |
EMAC0_ADDRFILTER_ENABLE | boolean := FALSE |
EMAC0_LTCHECK_DISABLE | boolean := FALSE |
EMAC0_RXFLOWCTRL_ENABLE | boolean := FALSE |
EMAC0_TXFLOWCTRL_ENABLE | boolean := FALSE |
EMAC0_TXRESET | boolean := FALSE |
EMAC0_TXJUMBOFRAME_ENABLE | boolean := FALSE |
EMAC0_TXINBANDFCS_ENABLE | boolean := FALSE |
EMAC0_TX_ENABLE | boolean := TRUE |
EMAC0_TXVLAN_ENABLE | boolean := FALSE |
EMAC0_TXHALFDUPLEX | boolean := FALSE |
EMAC0_TXIFGADJUST_ENABLE | boolean := FALSE |
EMAC0_RXRESET | boolean := FALSE |
EMAC0_RXJUMBOFRAME_ENABLE | boolean := FALSE |
EMAC0_RXINBANDFCS_ENABLE | boolean := FALSE |
EMAC0_RX_ENABLE | boolean := TRUE |
EMAC0_RXVLAN_ENABLE | boolean := FALSE |
EMAC0_RXHALFDUPLEX | boolean := FALSE |
EMAC0_PAUSEADDR | bit_vector := x " FFEEDDCCBBAA " |
EMAC0_UNICASTADDR | bit_vector := x " 000000000000 " |
EMAC0_DCRBASEADDR | bit_vector := X " 00 " |
Signals | |
gnd_v48_i | std_logic_vector ( 47 downto 0 ) |
client_rx_data_0_i | std_logic_vector ( 15 downto 0 ) |
client_tx_data_0_i | std_logic_vector ( 15 downto 0 ) |
client_tx_data_valid_0_i | std_logic |
client_tx_data_valid_msb_0_i | std_logic |
Attributes | |
X_CORE_INFO | string |
X_CORE_INFO | WRAPPER : architecture is " v5_emac_v1_8 , Coregen 13.1 " |
CORE_GENERATION_INFO | string |
CORE_GENERATION_INFO | WRAPPER : architecture is " v5_emac_v1_8_serdes , v5_emac_v1_8 , {c_emac0 = true , c_emac1 = false , c_has_mii_emac0 = false , c_has_mii_emac1 = false , c_has_gmii_emac0 = false , c_has_gmii_emac1 = true , c_has_rgmii_v1_3_emac0 = false , c_has_rgmii_v1_3_emac1 = false , c_has_rgmii_v2_0_emac0 = false , c_has_rgmii_v2_0_emac1 = false , c_has_sgmii_emac0 = false , c_has_sgmii_emac1 = false , c_has_gpcs_emac0 = true , c_has_gpcs_emac1 = false , c_tri_speed_emac0 = false , c_tri_speed_emac1 = false , c_speed_10_emac0 = false , c_speed_10_emac1 = false , c_speed_100_emac0 = false , c_speed_100_emac1 = false , c_speed_1000_emac0 = true , c_speed_1000_emac1 = true , c_has_host = false , c_has_dcr = false , c_has_mdio_emac0 = false , c_has_mdio_emac1 = false , c_client_16_emac0 = false , c_client_16_emac1 = false , c_add_filter_emac0 = false , c_add_filter_emac1 = false , c_has_clock_enable_emac0 = false , c_has_clock_enable_emac1 = false , } " |
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v5_emac | temac |
v5_emac | temac |
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