v6_gtxwizard_top Entity Reference

Inheritance diagram for v6_gtxwizard_top:

Collaboration diagram for v6_gtxwizard_top:

Entities
wrapper	architecture

Libraries
ieee
UNISIM

Use Clauses
std_logic_1164
numeric_std
Vcomponents

Ports
RESETDONE	out std_logic
ENMCOMMAALIGN	in std_logic
ENPCOMMAALIGN	in std_logic
LOOPBACK	in std_logic
POWERDOWN	in std_logic
RXUSRCLK2	in std_logic
RXRESET	in std_logic
TXCHARDISPMODE	in std_logic
TXCHARDISPVAL	in std_logic
TXCHARISK	in std_logic
TXDATA	in std_logic_vector ( 7 downto 0 )
TXUSRCLK2	in std_logic
TXRESET	in std_logic
RXCHARISCOMMA	out std_logic
RXCHARISK	out std_logic
RXCLKCORCNT	out std_logic_vector ( 2 downto 0 )
RXDATA	out std_logic_vector ( 7 downto 0 )
RXDISPERR	out std_logic
RXNOTINTABLE	out std_logic
RXRUNDISP	out std_logic
RXBUFERR	out std_logic
TXBUFERR	out std_logic
PLLLKDET	out std_logic
TXOUTCLK	out std_logic
RXELECIDLE	out std_logic
TXN	out std_logic
TXP	out std_logic
RXN	in std_logic
RXP	in std_logic
CLK_DS	in std_logic
PMARESET	in std_logic

Member Data Documentation

CLK_DS

CLK_DS in std_logic

Port

ENMCOMMAALIGN

ENMCOMMAALIGN in std_logic

Port

ENPCOMMAALIGN

ENPCOMMAALIGN in std_logic

Port

ieee

ieee

Library

LOOPBACK

LOOPBACK in std_logic

Port

numeric_std

numeric_std

Package

PLLLKDET

PLLLKDET out std_logic

Port

PMARESET

PMARESET in std_logic

Port

POWERDOWN

POWERDOWN in std_logic

Port

RESETDONE

RESETDONE out std_logic

Port

RXBUFERR

RXBUFERR out std_logic

Port

RXCHARISCOMMA

RXCHARISCOMMA out std_logic

Port

RXCHARISK

RXCHARISK out std_logic

Port

RXCLKCORCNT

RXCLKCORCNT out std_logic_vector ( 2 downto 0 )

Port

RXDATA

RXDATA out std_logic_vector ( 7 downto 0 )

Port

RXDISPERR

RXDISPERR out std_logic

Port

RXELECIDLE

RXELECIDLE out std_logic

Port

RXN

RXN in std_logic

Port

RXNOTINTABLE

RXNOTINTABLE out std_logic

Port

RXP

RXP in std_logic

Port

RXRESET

RXRESET in std_logic

Port

RXRUNDISP

RXRUNDISP out std_logic

Port

RXUSRCLK2

RXUSRCLK2 in std_logic

Port

std_logic_1164

std_logic_1164

Package

TXBUFERR

TXBUFERR out std_logic

Port

TXCHARDISPMODE

TXCHARDISPMODE in std_logic

Port

TXCHARDISPVAL

TXCHARDISPVAL in std_logic

Port

TXCHARISK

TXCHARISK in std_logic

Port

TXDATA

TXDATA in std_logic_vector ( 7 downto 0 )

Port

TXN

TXN out std_logic

Port

TXOUTCLK

TXOUTCLK out std_logic

Port

TXP

TXP out std_logic

Port

TXRESET

TXRESET in std_logic

Port

TXUSRCLK2

TXUSRCLK2 in std_logic

Port

UNISIM

UNISIM

Library

Vcomponents

Vcomponents

Package

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The documentation for this class was generated from the following file:

• components/ipbus_eth/firmware/gen_hdl/v6_emac_v2_3_basex/v6_gtxwizard_top.vhd