wrapper Architecture Reference

Processes
PROCESS_255	( PMARESET , clk_ds_i )
PROCESS_816	( PMARESET , clk_ds_i )

Components
sync_block	<Entity sync_block>
V6_GTXWIZARD	<Entity V6_GTXWIZARD>

Signals
GND_BUS	std_logic_vector ( 55 downto 0 )
RXBUFSTATUS_float	std_logic_vector ( 1 downto 0 )
TXBUFSTATUS_float	std_logic
clk_ds_i	std_logic
pma_reset_i	std_logic
reset_r	std_logic_vector ( 3 downto 0 )
resetdone_tx_i	std_logic
resetdone_tx_int	std_logic
resetdone_tx_r	std_logic
resetdone_rx_i	std_logic
resetdone_rx_int	std_logic
resetdone_rx_r	std_logic
resetdone_i	std_logic

Attributes
SHREG_EXTRACT	string
SHREG_EXTRACT	reset_r : signal is " NO "
ASYNC_REG	string
ASYNC_REG	reset_r : signal is " TRUE "

Instantiations
bufr_clk_ds	bufr
v6_gtxwizard_inst	V6_GTXWIZARD <Entity V6_GTXWIZARD>
resetdone_tx_sync_block	sync_block <Entity sync_block>
resetdone_rx_sync_block	sync_block <Entity sync_block>
bufr_clk_ds	bufr
v6_gtxwizard_inst	V6_GTXWIZARD <Entity V6_GTXWIZARD>
resetdone_tx_sync_block	sync_block <Entity sync_block>
resetdone_rx_sync_block	sync_block <Entity sync_block>

Member Function Documentation

PROCESS_255()

PROCESS_255	(		PMARESET,
			clk_ds_i
	)

PROCESS_816()

PROCESS_816	(		PMARESET,
			clk_ds_i
	)

Member Data Documentation

ASYNC_REG [1/2]

ASYNC_REG string

Attribute

ASYNC_REG [2/2]

ASYNC_REG reset_r : signal is " TRUE "

Attribute

bufr_clk_ds [1/2]

bufr_clk_ds bufr

Instantiation

bufr_clk_ds [2/2]

bufr_clk_ds bufr

Instantiation

clk_ds_i

clk_ds_i std_logic

Signal

GND_BUS

GND_BUS std_logic_vector ( 55 downto 0 )

Signal

pma_reset_i

pma_reset_i std_logic

Signal

reset_r

reset_r std_logic_vector ( 3 downto 0 )

Signal

resetdone_i

resetdone_i std_logic

Signal

resetdone_rx_i

resetdone_rx_i std_logic

Signal

resetdone_rx_int

resetdone_rx_int std_logic

Signal

resetdone_rx_r

resetdone_rx_r std_logic

Signal

resetdone_rx_sync_block [1/2]

resetdone_rx_sync_block sync_block

Instantiation

resetdone_rx_sync_block [2/2]

resetdone_rx_sync_block sync_block

Instantiation

resetdone_tx_i

resetdone_tx_i std_logic

Signal

resetdone_tx_int

resetdone_tx_int std_logic

Signal

resetdone_tx_r

resetdone_tx_r std_logic

Signal

resetdone_tx_sync_block [1/2]

resetdone_tx_sync_block sync_block

Instantiation

resetdone_tx_sync_block [2/2]

resetdone_tx_sync_block sync_block

Instantiation

RXBUFSTATUS_float

RXBUFSTATUS_float std_logic_vector ( 1 downto 0 )

Signal

SHREG_EXTRACT [1/2]

SHREG_EXTRACT string

Attribute

SHREG_EXTRACT [2/2]

SHREG_EXTRACT reset_r : signal is " NO "

Attribute

sync_block

sync_block

Component

TXBUFSTATUS_float

TXBUFSTATUS_float std_logic

Signal

V6_GTXWIZARD

V6_GTXWIZARD

Component

v6_gtxwizard_inst [1/2]

v6_gtxwizard_inst V6_GTXWIZARD

Instantiation

v6_gtxwizard_inst [2/2]

v6_gtxwizard_inst V6_GTXWIZARD

Instantiation

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The documentation for this class was generated from the following file:

• components/ipbus_eth/firmware/gen_hdl/v6_emac_v2_3_basex/v6_gtxwizard_top.vhd