RTL Architecture Reference

Processes
PROCESS_111	( clock )

Signals
first_event	std_logic
chan_out_i	STD_LOGIC_VECTOR ( 4 downto 0 )

Detailed Description

Definition at line 47 of file dummy_chan_in.vhd.

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The documentation for this class was generated from the following file:

• ROD/packet_processor/hdl/dummy_chan_in.vhd