ROD firmware  1.0.5
ATLAS l1-calo - ROD_eFEX and ROD_jFEX firmware for the L1Calo ROD board

Back to ROD documentation
Libraries | Ports | Use Clauses
priority_encoder Entity Reference
Inheritance diagram for priority_encoder:
backplane_regs input_fifos input_fifos_p2 packet_processor rod_top top_rod_efex top_rod_jfex

Entities

RTL  architecture
 

Libraries

IEEE 

Use Clauses

STD_LOGIC_1164 
numeric_std 

Ports

chan_ena   in   STD_LOGIC_VECTOR ( 23 downto 0 )
clock   in   STD_LOGIC
first_chan   out   STD_LOGIC_vector ( 4 downto 0 )
last_chan   out   STD_LOGIC_vector ( 4 downto 0 )

Detailed Description

Definition at line 34 of file priority_encoder.vhd.


The documentation for this class was generated from the following file: