Index of /efex/firmware/ROD/official/v0.5.25/rod_efex-v0.5.25/reports
Name Last modified Size Description
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Parent Directory -
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fifo1KB_34bit_utilization_synth.rpt 2023-10-05 11:21 8.2K
ila_2_utilization_synth.rpt 2023-10-05 11:21 8.4K
axi_ch0_utilization_synth.rpt 2023-10-05 11:21 8.3K
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hierarchical_utilization.txt 2023-10-05 11:21 3.7M
debug_ila_ed1_utilization_synth.rpt 2023-10-05 11:21 8.5K
ila_fullmode_utilization_synth.rpt 2023-10-05 11:21 8.5K
bulk_ila_synth_1.log 2023-10-05 11:21 224K
ttc_header_fifo_utilization_synth.rpt 2023-10-05 11:21 8.2K
vio_ttc_synth_1.log 2023-10-05 11:21 32K
ila_bulk_ttc_synth_1.log 2023-10-05 11:21 230K
debug_ila_ed1_synth_1.log 2023-10-05 11:21 235K
axi_ch0_synth_1.log 2023-10-05 11:21 221K
axis_input_fifo_synth_1.log 2023-10-05 11:21 48K
aurora_in_fifo_utilization_synth.rpt 2023-10-05 11:21 8.3K
top_rod_efex_drc_opted.rpt 2023-10-05 11:21 8.1K
rod_RO_Tx_utilization_synth.rpt 2023-10-05 11:21 8.3K
ethernet_mac_rgmii_utilization_synth.rpt 2023-10-05 11:21 9.1K
rgmii_rx_fifo_2_utilization_synth.rpt 2023-10-05 11:21 8.0K
aurora_rx_1q_synth_1.log 2023-10-05 11:21 130K
pp_ctrl_vio_utilization_synth.rpt 2023-10-05 11:21 7.8K
ila_l1id_cont_synth_1.log 2023-10-05 11:21 230K
top_rod_efex_io_placed.rpt 2023-10-05 11:21 604K
axis_dwidth_64_32_synth_1.log 2023-10-05 11:21 32K
ila_ev_builder_utilization_synth.rpt 2023-10-05 11:21 8.5K
MGT_combined_ttc_rx_utilization_synth.rpt 2023-10-05 11:21 8.4K
vio_ttc_utilization_synth.rpt 2023-10-05 11:21 7.8K
chan_map_ila_synth_1.log 2023-10-05 11:21 218K
synth_1.log 2023-10-05 11:21 941K
aurora_rx_4l_64b_utilization_synth.rpt 2023-10-05 11:21 8.4K
packet_processor_clock_utilization_synth.rpt 2023-10-05 11:21 7.7K
axi_ila_1_synth_1.log 2023-10-05 11:21 229K
aurora_fifo_in_ila_utilization_synth.rpt 2023-10-05 11:21 8.5K
axi_ila_1_utilization_synth.rpt 2023-10-05 11:21 8.5K
ila_fullmode_synth_1.log 2023-10-05 11:21 229K
axis_data_fifo_0_synth_1.log 2023-10-05 11:22 46K
ila_1_utilization_synth.rpt 2023-10-05 11:22 8.3K
vio_ip_address_utilization_synth.rpt 2023-10-05 11:22 7.8K
ila_l1id_cont_utilization_synth.rpt 2023-10-05 11:22 8.4K
fm_status_fifo_synth_1.log 2023-10-05 11:22 50K
axis_data_fifo_0_utilization_synth.rpt 2023-10-05 11:22 8.2K
top_rod_efex_control_sets_placed.rpt 2023-10-05 11:22 3.7M
vio_0_synth_1.log 2023-10-05 11:22 686
ila_fifo_synth_1.log 2023-10-05 11:22 228K
ila_ttc_out_synth_1.log 2023-10-05 11:22 223K
chan_crc_ila_utilization_synth.rpt 2023-10-05 11:22 8.5K
vio_top_synth_1.log 2023-10-05 11:22 32K
vio_fullmode_reset_utilization_synth.rpt 2023-10-05 11:22 7.9K
chan_crc_ila_synth_1.log 2023-10-05 11:22 226K
rod_RO_Tx_synth_1.log 2023-10-05 11:22 51K
ila_mgtfsm_utilization_synth.rpt 2023-10-05 11:22 8.4K
ila_2_synth_1.log 2023-10-05 11:22 231K
bulk_ila_utilization_synth.rpt 2023-10-05 11:22 8.4K
ila_1_synth_1.log 2023-10-05 11:22 216K
MGT_combined_ttc_rx_synth_1.log 2023-10-05 11:22 62K
backplane_control_ila_utilization_synth.rpt 2023-10-05 11:22 8.4K
top_rod_efex_utilization_placed.rpt 2023-10-05 11:22 15K
rgmii_rx_fifo_2_synth_1.log 2023-10-05 11:22 41K
aurora_fifo_in_ila_synth_1.log 2023-10-05 11:22 228K
chan_map_ila_utilization_synth.rpt 2023-10-05 11:22 8.4K
DPram_32b_synth_1.log 2023-10-05 11:22 35K
ila_bulk_ttc_utilization_synth.rpt 2023-10-05 11:22 8.5K
bulk_data_fifo_synth_1.log 2023-10-05 11:22 41K
axis_input_fifo_utilization_synth.rpt 2023-10-05 11:22 8.0K
ttc_header_fifo_synth_1.log 2023-10-05 11:22 51K
ila_fifo_utilization_synth.rpt 2023-10-05 11:22 8.4K
ila_ttc_out_utilization_synth.rpt 2023-10-05 11:22 8.5K
aurora_fifo_out_ila_synth_1.log 2023-10-05 11:22 225K
fm_status_fifo_utilization_synth.rpt 2023-10-05 11:22 8.2K
aurora_fifo_out_ila_utilization_synth.rpt 2023-10-05 11:22 8.4K
aurora_rx_4l_64b_synth_1.log 2023-10-05 11:22 135K
vio_ip_address_synth_1.log 2023-10-05 11:22 32K
axis_dwidth_64_32_utilization_synth.rpt 2023-10-05 11:22 7.8K
event_builder_fifo_synth_1.log 2023-10-05 11:22 583
pp_ctrl_vio_synth_1.log 2023-10-05 11:22 33K
ila_ttc_in_synth_1.log 2023-10-05 11:22 232K
ethernet_mac_rgmii_synth_1.log 2023-10-05 11:22 88K
fifo1KB_34bit_synth_1.log 2023-10-05 11:22 49K
ila_mgtfsm_synth_1.log 2023-10-05 11:22 223K
ila_ev_builder_synth_1.log 2023-10-05 11:22 246K
processor_in_fifo_utilization_synth.rpt 2023-10-05 11:22 8.3K
bulk_data_fifo_utilization_synth.rpt 2023-10-05 11:22 8.0K
clk_wiz_240_utilization_synth.rpt 2023-10-05 11:22 7.6K
backplane_control_ila_synth_1.log 2023-10-05 11:22 218K
ila_ttc_in_utilization_synth.rpt 2023-10-05 11:22 8.4K
rod_ROctrl_mux_ila_utilization_synth.rpt 2023-10-05 11:22 8.4K
impl_1.log 2023-10-05 11:22 274K
error_ila_utilization_synth.rpt 2023-10-05 11:22 8.4K
data_fifo_vio_synth_1.log 2023-10-05 11:22 563
aurora_rx_1q_utilization_synth.rpt 2023-10-05 11:22 8.3K
vio_top_utilization_synth.rpt 2023-10-05 11:22 7.8K
error_ila_synth_1.log 2023-10-05 11:22 228K
rod_ROctrl_mux_ila_synth_1.log 2023-10-05 11:22 223K
vio_fullmode_reset_synth_1.log 2023-10-05 11:22 33K
DPram_32b_utilization_synth.rpt 2023-10-05 11:22 7.6K
processor_in_fifo_synth_1.log 2023-10-05 11:22 47K
top_rod_efex_utilization_synth.rpt 2023-10-05 11:22 11K
aurora_in_fifo_synth_1.log 2023-10-05 11:22 51K
packet_processor_clock_synth_1.log 2023-10-05 11:22 22K
clk_wiz_240_synth_1.log 2023-10-05 11:22 21K