65 use IEEE.STD_LOGIC_1164.
all;
66 use IEEE.NUMERIC_STD.
all;
81 OUT_Data : out TriggerTowers(3*INPUT_ROWS-1 downto 0));
90 signal ShiftTowers : TriggerTowersArray(INPUT_COLUMNS downto 0)(INPUT_ROWS-1 downto 0);
91 signal LeftRight : std_logic;
94 attribute keep : string ;
95 attribute max_fanout : integer;
103 2*INPUT_ROWS-1 downto INPUT_ROWS => ShiftTowers(1)(INPUT_ROWS-1 downto 0),
104 3*INPUT_ROWS-1 downto 2*INPUT_ROWS => ShiftTowers(2)(INPUT_ROWS-1 downto 0));
114 if rising_edge(CLK200) then
119 ShiftTowers(INPUT_COLUMNS) <= (others => ZERO_TRIGGER_TOWER);
130 ShiftTowers(INPUT_COLUMNS) <= (others => ZERO_TRIGGER_TOWER);
External data-types and functions.
Algorithm input-data shift register.
TriggerTowersArray( INPUT_COLUMNS downto 0)( INPUT_ROWS- 1 downto 0) ShiftTowers
The whole memory blocks of the shift resgiste.
Algorithm input-data shift register.
in CLK200 std_logic
200 MHz clock
in IN_Edge std_logic
Signal indicating if eFEX is on edge position.
in IN_Load std_logic
In load signal, synch with data arrival.
in IN_LeftRight std_logic
Signal indicating if eFEX module position.
in IN_Data TriggerTowerMatrix
All TT input data defined in DataTypes.vhd.
out OUT_Data TriggerTowers( 3* INPUT_ROWS- 1 downto 0)
Output data to be fed to algorithm logic (3 columns)