eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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AlgoShiftRegister.vhd
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1 -------------------------------------------------------
61 -------------------------------------------------------
62 
64 library IEEE;
65 use IEEE.STD_LOGIC_1164.all;
66 use IEEE.NUMERIC_STD.all;
67 
69 use work.DataTypes.all;
71 use work.AlgoDataTypes.all;
72 
75  port (CLK200 : in std_logic;
76 
77  IN_Load : in std_logic;
78  IN_Data : in TriggerTowerMatrix;
79  IN_Edge : in std_logic;
80  IN_LeftRight : in std_logic;
81  OUT_Data : out TriggerTowers(3*INPUT_ROWS-1 downto 0));
83 
85 architecture Behavioral of AlgoShiftRegister is
86 
90  signal ShiftTowers : TriggerTowersArray(INPUT_COLUMNS downto 0)(INPUT_ROWS-1 downto 0);
91  signal LeftRight : std_logic;
92 
93 -- ####### attributes ########
94  attribute keep : string ;
95  attribute max_fanout : integer;
96  attribute keep of ShiftTowers : signal is "true" ;
97  attribute max_fanout of ShiftTowers : signal is 30;
98 
99 -- #######################################
100 begin
101 
102  OUT_Data <= (INPUT_ROWS-1 downto 0 => ShiftTowers(0)(INPUT_ROWS-1 downto 0),
103  2*INPUT_ROWS-1 downto INPUT_ROWS => ShiftTowers(1)(INPUT_ROWS-1 downto 0),
104  3*INPUT_ROWS-1 downto 2*INPUT_ROWS => ShiftTowers(2)(INPUT_ROWS-1 downto 0));
105 
106  -- When eFEX is not on edge, posistion is always considered to be left
107  LeftRight <= '0' when IN_Edge = '0' else IN_LeftRight;
108 
112  LOADER_SHIFTER : process (CLK200)
113  begin
114  if rising_edge(CLK200) then
115  if IN_Load = '1' then
116  case LeftRight is
117  when '0' =>
118  -- left, put zeroes in the last (high eta) column
119  ShiftTowers(INPUT_COLUMNS) <= (others => ZERO_TRIGGER_TOWER);
120  ShiftTowers(INPUT_COLUMNS-1 downto 0) <= IN_Data;
121 
122  when others =>
123  -- right, put zeroes in the first (small eta) column
124  ShiftTowers(INPUT_COLUMNS downto 1) <= IN_Data;
125  ShiftTowers(0) <= (others => ZERO_TRIGGER_TOWER);
126  end case;
127 
128  else
129  -- shift data
130  ShiftTowers(INPUT_COLUMNS) <= (others => ZERO_TRIGGER_TOWER);
131  ShiftTowers(INPUT_COLUMNS-1 downto 0) <= ShiftTowers(INPUT_COLUMNS downto 1);
132  end if;
133  end if;
134  end process;
135 
136 end Behavioral;
External data-types and functions.
Algorithm input-data shift register.
TriggerTowersArray( INPUT_COLUMNS downto 0)( INPUT_ROWS- 1 downto 0) ShiftTowers
The whole memory blocks of the shift resgiste.
Algorithm input-data shift register.
in CLK200 std_logic
200 MHz clock
in IN_Edge std_logic
Signal indicating if eFEX is on edge position.
in IN_Load std_logic
In load signal, synch with data arrival.
in IN_LeftRight std_logic
Signal indicating if eFEX module position.
in IN_Data TriggerTowerMatrix
All TT input data defined in DataTypes.vhd.
out OUT_Data TriggerTowers( 3* INPUT_ROWS- 1 downto 0)
Output data to be fed to algorithm logic (3 columns)