MGT_4_quad_gen.vhd File Reference

MGT quad generation. More...

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Entities
MGT_4_quad_gen	entity
	MGT quad generation. More...
Behavioral	architecture
	MGT quad generation. More...

Detailed Description

MGT quad generation.

MGT_4_quad_gen generates num_quad_tx_rx MGT quads that contain both transmitters and receivers. This is done via an intermediate 'wrapper' level of hierarchy that ties off unused signals and thus simplifies the interface to the MGTs at this level. The transceiver and receiver in each MGT operate independently of each other: they do not comprise a duplex link. They are grouped together in the VHDL only because they are co-located in the same MGT.

On the receive path, this component performs the following functions:

• Receives 16 × 11.2 Gb/s serial data streams (from the LAr and/or Tile calorimeters, but this block is agnostic with respect to the source)
• Decodes the data using the 8b/10b line code;
• Recovers a 280 MHz clock from the data;
• Converts each serial data stream to parallel data, 32 bits wide, synchronous with the recovered 280 MHz clock;
• Performs word-alignment of the output data to the 280 MHz clock (such that bit 0 of each 32-bit word is located in the correct place)
• Outputs, for each of the 16 32-bit data outputs, a signal indicating when a comma has been received (the signal COMMADET from the Xilinx MGT block).

Definition in file MGT_4_quad_gen.vhd.