eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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Attributes | Components | Constants | Instantiations | Processes | Signals
behav Architecture Reference

Processes

ap_CS_fsm_assign_proc  ( ap_clk )
PROCESS_9  ( ap_clk )
PROCESS_10  ( ap_clk )
PROCESS_11  ( ap_clk )
PROCESS_12  ( ap_clk )
ap_NS_fsm_assign_proc  ( ap_CS_fsm , ap_block_pp0_stage0_subdone , ap_reset_idle_pp0 )
ap_idle_pp0_assign_proc  ( ap_enable_reg_pp0_iter1 , ap_enable_reg_pp0_iter2 , ap_enable_reg_pp0_iter3 , ap_enable_reg_pp0_iter4 , ap_enable_reg_pp0_iter5 )
score_0_ap_vld_assign_proc  ( ap_block_pp0_stage0_11001 , ap_enable_reg_pp0_iter5 )

Components

BDTModel_decision_function_31  <Entity BDTModel_decision_function_31>
BDTModel_decision_function_30  <Entity BDTModel_decision_function_30>
BDTModel_decision_function_19  <Entity BDTModel_decision_function_19>
BDTModel_decision_function_8  <Entity BDTModel_decision_function_8>
BDTModel_decision_function_5  <Entity BDTModel_decision_function_5>
BDTModel_decision_function_4  <Entity BDTModel_decision_function_4>
BDTModel_decision_function_3  <Entity BDTModel_decision_function_3>
BDTModel_decision_function_2  <Entity BDTModel_decision_function_2>
BDTModel_decision_function_1  <Entity BDTModel_decision_function_1>
BDTModel_decision_function  <Entity BDTModel_decision_function>
BDTModel_decision_function_29  <Entity BDTModel_decision_function_29>
BDTModel_decision_function_28  <Entity BDTModel_decision_function_28>
BDTModel_decision_function_27  <Entity BDTModel_decision_function_27>
BDTModel_decision_function_26  <Entity BDTModel_decision_function_26>
BDTModel_decision_function_25  <Entity BDTModel_decision_function_25>
BDTModel_decision_function_24  <Entity BDTModel_decision_function_24>
BDTModel_decision_function_23  <Entity BDTModel_decision_function_23>
BDTModel_decision_function_22  <Entity BDTModel_decision_function_22>
BDTModel_decision_function_21  <Entity BDTModel_decision_function_21>
BDTModel_decision_function_20  <Entity BDTModel_decision_function_20>
BDTModel_decision_function_18  <Entity BDTModel_decision_function_18>
BDTModel_decision_function_17  <Entity BDTModel_decision_function_17>
BDTModel_decision_function_16  <Entity BDTModel_decision_function_16>
BDTModel_decision_function_15  <Entity BDTModel_decision_function_15>
BDTModel_decision_function_14  <Entity BDTModel_decision_function_14>
BDTModel_decision_function_13  <Entity BDTModel_decision_function_13>
BDTModel_decision_function_12  <Entity BDTModel_decision_function_12>
BDTModel_decision_function_11  <Entity BDTModel_decision_function_11>
BDTModel_decision_function_10  <Entity BDTModel_decision_function_10>
BDTModel_decision_function_9  <Entity BDTModel_decision_function_9>
BDTModel_decision_function_7  <Entity BDTModel_decision_function_7>
BDTModel_decision_function_6  <Entity BDTModel_decision_function_6>

Constants

ap_const_logic_1  STD_LOGIC := ' 1 '
ap_const_logic_0  STD_LOGIC := ' 0 '
ap_ST_fsm_pp0_stage0  STD_LOGIC_VECTOR ( 0 downto 0 ) := " 1 "
ap_const_boolean_1  BOOLEAN := true
ap_const_lv32_0  STD_LOGIC_VECTOR ( 31 downto 0 ) := " 00000000000000000000000000000000 "
ap_const_boolean_0  BOOLEAN := false

Signals

s_decision_function_31_fu_187_ap_return  STD_LOGIC_VECTOR ( 6 downto 0 )
s_reg_857  STD_LOGIC_VECTOR ( 6 downto 0 )
ap_CS_fsm  STD_LOGIC_VECTOR ( 0 downto 0 ) := " 1 "
ap_CS_fsm_pp0_stage0  STD_LOGIC
ap_block_pp0_stage0_11001  BOOLEAN
s_1_decision_function_30_fu_195_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_1_reg_862  STD_LOGIC_VECTOR ( 5 downto 0 )
s_2_decision_function_19_fu_203_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_2_reg_867  STD_LOGIC_VECTOR ( 5 downto 0 )
s_3_decision_function_8_fu_211_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_3_reg_872  STD_LOGIC_VECTOR ( 5 downto 0 )
s_4_decision_function_5_fu_221_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_4_reg_877  STD_LOGIC_VECTOR ( 5 downto 0 )
s_5_decision_function_4_fu_231_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_5_reg_882  STD_LOGIC_VECTOR ( 5 downto 0 )
s_6_decision_function_3_fu_239_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_6_reg_887  STD_LOGIC_VECTOR ( 5 downto 0 )
s_7_decision_function_2_fu_247_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_7_reg_892  STD_LOGIC_VECTOR ( 5 downto 0 )
s_8_decision_function_1_fu_257_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_8_reg_897  STD_LOGIC_VECTOR ( 5 downto 0 )
s_9_decision_function_fu_267_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_9_reg_902  STD_LOGIC_VECTOR ( 5 downto 0 )
s_10_decision_function_29_fu_277_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_10_reg_907  STD_LOGIC_VECTOR ( 5 downto 0 )
s_11_decision_function_28_fu_285_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_11_reg_912  STD_LOGIC_VECTOR ( 5 downto 0 )
s_12_decision_function_27_fu_295_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_12_reg_917  STD_LOGIC_VECTOR ( 5 downto 0 )
s_13_decision_function_26_fu_305_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_13_reg_922  STD_LOGIC_VECTOR ( 5 downto 0 )
s_14_decision_function_25_fu_313_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_14_reg_927  STD_LOGIC_VECTOR ( 5 downto 0 )
s_15_decision_function_24_fu_323_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_15_reg_932  STD_LOGIC_VECTOR ( 5 downto 0 )
s_16_decision_function_23_fu_331_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_16_reg_937  STD_LOGIC_VECTOR ( 5 downto 0 )
s_17_decision_function_22_fu_341_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_17_reg_942  STD_LOGIC_VECTOR ( 5 downto 0 )
s_18_decision_function_21_fu_351_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_18_reg_947  STD_LOGIC_VECTOR ( 5 downto 0 )
s_19_decision_function_20_fu_359_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_19_reg_952  STD_LOGIC_VECTOR ( 5 downto 0 )
s_20_decision_function_18_fu_367_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_20_reg_957  STD_LOGIC_VECTOR ( 5 downto 0 )
s_21_decision_function_17_fu_377_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_21_reg_962  STD_LOGIC_VECTOR ( 5 downto 0 )
s_22_decision_function_16_fu_387_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_22_reg_967  STD_LOGIC_VECTOR ( 5 downto 0 )
s_23_decision_function_15_fu_397_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_23_reg_972  STD_LOGIC_VECTOR ( 5 downto 0 )
s_24_decision_function_14_fu_405_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_24_reg_977  STD_LOGIC_VECTOR ( 5 downto 0 )
s_25_decision_function_13_fu_413_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_25_reg_982  STD_LOGIC_VECTOR ( 5 downto 0 )
s_26_decision_function_12_fu_423_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_26_reg_987  STD_LOGIC_VECTOR ( 5 downto 0 )
s_27_decision_function_11_fu_431_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_27_reg_992  STD_LOGIC_VECTOR ( 5 downto 0 )
s_28_decision_function_10_fu_441_ap_return  STD_LOGIC_VECTOR ( 6 downto 0 )
s_28_reg_997  STD_LOGIC_VECTOR ( 6 downto 0 )
s_29_decision_function_9_fu_451_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_29_reg_1002  STD_LOGIC_VECTOR ( 5 downto 0 )
s_30_decision_function_7_fu_461_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_30_reg_1007  STD_LOGIC_VECTOR ( 5 downto 0 )
s_31_decision_function_6_fu_471_ap_return  STD_LOGIC_VECTOR ( 5 downto 0 )
s_31_reg_1012  STD_LOGIC_VECTOR ( 5 downto 0 )
add_ln352_1_fu_575_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_1_reg_1017  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_2_fu_581_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_2_reg_1022  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_6_fu_607_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_6_reg_1027  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_6_reg_1027_pp0_iter2_reg  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_10_fu_633_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_10_reg_1032  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_13_fu_659_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_13_reg_1037  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_18_fu_685_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_18_reg_1042  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_21_fu_711_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_21_reg_1047  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_25_fu_737_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_25_reg_1052  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_25_reg_1052_pp0_iter2_reg  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_26_fu_743_p2  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_26_reg_1057  STD_LOGIC_VECTOR ( 7 downto 0 )
add_ln352_27_fu_749_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_27_reg_1062  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_3_fu_761_p2  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_3_reg_1067  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_14_fu_773_p2  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_14_reg_1072  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_14_reg_1072_pp0_iter3_reg  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_14_reg_1072_pp0_iter4_reg  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_22_fu_785_p2  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_22_reg_1077  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_22_reg_1077_pp0_iter3_reg  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_28_fu_797_p2  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_28_reg_1082  STD_LOGIC_VECTOR ( 8 downto 0 )
add_ln352_7_fu_809_p2  STD_LOGIC_VECTOR ( 9 downto 0 )
add_ln352_7_reg_1087  STD_LOGIC_VECTOR ( 9 downto 0 )
add_ln352_7_reg_1087_pp0_iter4_reg  STD_LOGIC_VECTOR ( 9 downto 0 )
add_ln352_29_fu_821_p2  STD_LOGIC_VECTOR ( 9 downto 0 )
add_ln352_29_reg_1092  STD_LOGIC_VECTOR ( 9 downto 0 )
add_ln352_30_fu_833_p2  STD_LOGIC_VECTOR ( 10 downto 0 )
add_ln352_30_reg_1097  STD_LOGIC_VECTOR ( 10 downto 0 )
ap_enable_reg_pp0_iter1  STD_LOGIC := ' 0 '
ap_block_pp0_stage0_subdone  BOOLEAN
ap_enable_reg_pp0_iter2  STD_LOGIC := ' 0 '
ap_enable_reg_pp0_iter3  STD_LOGIC := ' 0 '
ap_enable_reg_pp0_iter4  STD_LOGIC := ' 0 '
ap_enable_reg_pp0_iter5  STD_LOGIC := ' 0 '
s_decision_function_31_fu_187_ap_ready  STD_LOGIC
s_1_decision_function_30_fu_195_ap_ready  STD_LOGIC
s_2_decision_function_19_fu_203_ap_ready  STD_LOGIC
s_3_decision_function_8_fu_211_ap_ready  STD_LOGIC
s_4_decision_function_5_fu_221_ap_ready  STD_LOGIC
s_5_decision_function_4_fu_231_ap_ready  STD_LOGIC
s_6_decision_function_3_fu_239_ap_ready  STD_LOGIC
s_7_decision_function_2_fu_247_ap_ready  STD_LOGIC
s_8_decision_function_1_fu_257_ap_ready  STD_LOGIC
s_9_decision_function_fu_267_ap_ready  STD_LOGIC
s_10_decision_function_29_fu_277_ap_ready  STD_LOGIC
s_11_decision_function_28_fu_285_ap_ready  STD_LOGIC
s_12_decision_function_27_fu_295_ap_ready  STD_LOGIC
s_13_decision_function_26_fu_305_ap_ready  STD_LOGIC
s_14_decision_function_25_fu_313_ap_ready  STD_LOGIC
s_15_decision_function_24_fu_323_ap_ready  STD_LOGIC
s_16_decision_function_23_fu_331_ap_ready  STD_LOGIC
s_17_decision_function_22_fu_341_ap_ready  STD_LOGIC
s_18_decision_function_21_fu_351_ap_ready  STD_LOGIC
s_19_decision_function_20_fu_359_ap_ready  STD_LOGIC
s_20_decision_function_18_fu_367_ap_ready  STD_LOGIC
s_21_decision_function_17_fu_377_ap_ready  STD_LOGIC
s_22_decision_function_16_fu_387_ap_ready  STD_LOGIC
s_23_decision_function_15_fu_397_ap_ready  STD_LOGIC
s_24_decision_function_14_fu_405_ap_ready  STD_LOGIC
s_25_decision_function_13_fu_413_ap_ready  STD_LOGIC
s_26_decision_function_12_fu_423_ap_ready  STD_LOGIC
s_27_decision_function_11_fu_431_ap_ready  STD_LOGIC
s_28_decision_function_10_fu_441_ap_ready  STD_LOGIC
s_29_decision_function_9_fu_451_ap_ready  STD_LOGIC
s_30_decision_function_7_fu_461_ap_ready  STD_LOGIC
s_31_decision_function_6_fu_471_ap_ready  STD_LOGIC
ap_block_pp0_stage0_ignoreCallOp18  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp19  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp20  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp21  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp22  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp23  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp24  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp25  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp26  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp27  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp28  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp29  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp30  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp31  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp32  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp33  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp34  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp35  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp36  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp37  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp38  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp39  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp40  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp41  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp42  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp43  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp44  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp45  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp46  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp47  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp48  BOOLEAN
ap_block_pp0_stage0_ignoreCallOp49  BOOLEAN
ap_block_pp0_stage0_01001  BOOLEAN
ap_block_pp0_stage0  BOOLEAN
zext_ln235_fu_482_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln231_fu_479_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln239_fu_485_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln243_fu_488_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln247_fu_491_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln251_fu_494_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_4_fu_587_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln255_fu_497_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln259_fu_500_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_5_fu_597_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_5_fu_603_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln352_4_fu_593_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln263_fu_503_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln267_fu_506_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_8_fu_613_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln271_fu_509_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln275_fu_512_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_9_fu_623_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_9_fu_629_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln352_8_fu_619_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln279_fu_515_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln283_fu_518_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_11_fu_639_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln287_fu_521_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln291_fu_524_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_12_fu_649_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_12_fu_655_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln352_11_fu_645_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln295_fu_527_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln299_fu_530_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_16_fu_665_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln303_fu_533_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln307_fu_536_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_17_fu_675_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_16_fu_681_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln352_15_fu_671_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln311_fu_539_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln315_fu_542_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_19_fu_691_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln319_fu_545_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln323_fu_548_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_20_fu_701_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_19_fu_707_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln352_18_fu_697_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln327_fu_551_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln331_fu_554_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_23_fu_717_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln335_fu_557_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln339_fu_560_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
add_ln352_24_fu_727_p2  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_23_fu_733_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln352_22_fu_723_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln343_fu_563_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln347_fu_566_p1  STD_LOGIC_VECTOR ( 7 downto 0 )
zext_ln351_fu_569_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_fu_572_p1  STD_LOGIC_VECTOR ( 6 downto 0 )
zext_ln352_2_fu_758_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_1_fu_755_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_13_fu_770_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_10_fu_767_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_20_fu_782_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_17_fu_779_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_26_fu_794_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_25_fu_791_p1  STD_LOGIC_VECTOR ( 8 downto 0 )
zext_ln352_6_fu_806_p1  STD_LOGIC_VECTOR ( 9 downto 0 )
zext_ln352_3_fu_803_p1  STD_LOGIC_VECTOR ( 9 downto 0 )
zext_ln352_27_fu_818_p1  STD_LOGIC_VECTOR ( 9 downto 0 )
zext_ln352_24_fu_815_p1  STD_LOGIC_VECTOR ( 9 downto 0 )
zext_ln352_28_fu_830_p1  STD_LOGIC_VECTOR ( 10 downto 0 )
zext_ln352_21_fu_827_p1  STD_LOGIC_VECTOR ( 10 downto 0 )
zext_ln352_14_fu_842_p1  STD_LOGIC_VECTOR ( 10 downto 0 )
zext_ln352_7_fu_839_p1  STD_LOGIC_VECTOR ( 10 downto 0 )
add_ln352_15_fu_845_p2  STD_LOGIC_VECTOR ( 10 downto 0 )
ap_NS_fsm  STD_LOGIC_VECTOR ( 0 downto 0 )
ap_reset_idle_pp0  STD_LOGIC
ap_idle_pp0  STD_LOGIC
ap_enable_pp0  STD_LOGIC
ap_ce_reg  STD_LOGIC

Attributes

CORE_GENERATION_INFO  STRING
CORE_GENERATION_INFO  architecture is " BDTModel_BDTModel , hls_ip_2024_1_2 , {HLS_INPUT_TYPE = cxx , HLS_INPUT_FLOAT = 0 , HLS_INPUT_FIXED = 0 , HLS_INPUT_PART = xc7vx550t-ffg1927-2 , HLS_INPUT_CLOCK = 5.000000 , HLS_INPUT_ARCH = pipeline , HLS_SYN_CLOCK = 2.457250 , HLS_SYN_LAT = 5 , HLS_SYN_TPT = 1 , HLS_SYN_MEM = 0 , HLS_SYN_DSP = 0 , HLS_SYN_FF = 444 , HLS_SYN_LUT = 3647 , HLS_VERSION = 2024_1_2} "
fsm_encoding  string
fsm_encoding  signal is " none "

Instantiations

s_decision_function_31_fu_187  BDTModel_decision_function_31 <Entity BDTModel_decision_function_31>
s_1_decision_function_30_fu_195  BDTModel_decision_function_30 <Entity BDTModel_decision_function_30>
s_2_decision_function_19_fu_203  BDTModel_decision_function_19 <Entity BDTModel_decision_function_19>
s_3_decision_function_8_fu_211  BDTModel_decision_function_8 <Entity BDTModel_decision_function_8>
s_4_decision_function_5_fu_221  BDTModel_decision_function_5 <Entity BDTModel_decision_function_5>
s_5_decision_function_4_fu_231  BDTModel_decision_function_4 <Entity BDTModel_decision_function_4>
s_6_decision_function_3_fu_239  BDTModel_decision_function_3 <Entity BDTModel_decision_function_3>
s_7_decision_function_2_fu_247  BDTModel_decision_function_2 <Entity BDTModel_decision_function_2>
s_8_decision_function_1_fu_257  BDTModel_decision_function_1 <Entity BDTModel_decision_function_1>
s_9_decision_function_fu_267  BDTModel_decision_function <Entity BDTModel_decision_function>
s_10_decision_function_29_fu_277  BDTModel_decision_function_29 <Entity BDTModel_decision_function_29>
s_11_decision_function_28_fu_285  BDTModel_decision_function_28 <Entity BDTModel_decision_function_28>
s_12_decision_function_27_fu_295  BDTModel_decision_function_27 <Entity BDTModel_decision_function_27>
s_13_decision_function_26_fu_305  BDTModel_decision_function_26 <Entity BDTModel_decision_function_26>
s_14_decision_function_25_fu_313  BDTModel_decision_function_25 <Entity BDTModel_decision_function_25>
s_15_decision_function_24_fu_323  BDTModel_decision_function_24 <Entity BDTModel_decision_function_24>
s_16_decision_function_23_fu_331  BDTModel_decision_function_23 <Entity BDTModel_decision_function_23>
s_17_decision_function_22_fu_341  BDTModel_decision_function_22 <Entity BDTModel_decision_function_22>
s_18_decision_function_21_fu_351  BDTModel_decision_function_21 <Entity BDTModel_decision_function_21>
s_19_decision_function_20_fu_359  BDTModel_decision_function_20 <Entity BDTModel_decision_function_20>
s_20_decision_function_18_fu_367  BDTModel_decision_function_18 <Entity BDTModel_decision_function_18>
s_21_decision_function_17_fu_377  BDTModel_decision_function_17 <Entity BDTModel_decision_function_17>
s_22_decision_function_16_fu_387  BDTModel_decision_function_16 <Entity BDTModel_decision_function_16>
s_23_decision_function_15_fu_397  BDTModel_decision_function_15 <Entity BDTModel_decision_function_15>
s_24_decision_function_14_fu_405  BDTModel_decision_function_14 <Entity BDTModel_decision_function_14>
s_25_decision_function_13_fu_413  BDTModel_decision_function_13 <Entity BDTModel_decision_function_13>
s_26_decision_function_12_fu_423  BDTModel_decision_function_12 <Entity BDTModel_decision_function_12>
s_27_decision_function_11_fu_431  BDTModel_decision_function_11 <Entity BDTModel_decision_function_11>
s_28_decision_function_10_fu_441  BDTModel_decision_function_10 <Entity BDTModel_decision_function_10>
s_29_decision_function_9_fu_451  BDTModel_decision_function_9 <Entity BDTModel_decision_function_9>
s_30_decision_function_7_fu_461  BDTModel_decision_function_7 <Entity BDTModel_decision_function_7>
s_31_decision_function_6_fu_471  BDTModel_decision_function_6 <Entity BDTModel_decision_function_6>

Detailed Description

Definition at line 30 of file BDTModel.vhd.

The documentation for this class was generated from the following file:
Generated on Tue Nov 11 2025 09:44:32 for eFEX firmware by   doxygen 1.9.1