eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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Attributes | Components | Constants | Instantiations | Signals
behav Architecture Reference

Components

BDTModel_sparsemux_9_2_7_1_1  <Entity BDTModel_sparsemux_9_2_7_1_1>

Constants

ap_const_logic_1  STD_LOGIC := ' 1 '
ap_const_boolean_1  BOOLEAN := true
ap_const_lv16_1BC  STD_LOGIC_VECTOR ( 15 downto 0 ) := " 0000000110111100 "
ap_const_lv32_3  STD_LOGIC_VECTOR ( 31 downto 0 ) := " 00000000000000000000000000000011 "
ap_const_lv32_F  STD_LOGIC_VECTOR ( 31 downto 0 ) := " 00000000000000000000000000001111 "
ap_const_lv13_0  STD_LOGIC_VECTOR ( 12 downto 0 ) := " 0000000000000 "
ap_const_lv16_28D  STD_LOGIC_VECTOR ( 15 downto 0 ) := " 0000001010001101 "
ap_const_lv1_1  STD_LOGIC_VECTOR ( 0 downto 0 ) := " 1 "
ap_const_lv2_2  STD_LOGIC_VECTOR ( 1 downto 0 ) := " 10 "
ap_const_lv2_3  STD_LOGIC_VECTOR ( 1 downto 0 ) := " 11 "
ap_const_lv7_1F  STD_LOGIC_VECTOR ( 6 downto 0 ) := " 0011111 "
ap_const_lv7_29  STD_LOGIC_VECTOR ( 6 downto 0 ) := " 0101001 "
ap_const_lv7_37  STD_LOGIC_VECTOR ( 6 downto 0 ) := " 0110111 "
ap_const_lv7_44  STD_LOGIC_VECTOR ( 6 downto 0 ) := " 1000100 "
ap_const_logic_0  STD_LOGIC := ' 0 '

Signals

tmp_fu_66_p4  STD_LOGIC_VECTOR ( 12 downto 0 )
comparison_fu_60_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
comparison_12_fu_76_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
comparison_13_fu_82_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
activation_23_fu_88_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
activation_fu_94_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
xor_ln170_fu_106_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
activation_26_fu_100_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
zext_ln170_fu_112_p1  STD_LOGIC_VECTOR ( 1 downto 0 )
or_ln170_fu_116_p2  STD_LOGIC_VECTOR ( 0 downto 0 )
select_ln170_fu_122_p3  STD_LOGIC_VECTOR ( 1 downto 0 )
agg_result_fu_138_p9  STD_LOGIC_VECTOR ( 6 downto 0 )
agg_result_fu_138_p10  STD_LOGIC_VECTOR ( 1 downto 0 )
agg_result_fu_138_p11  STD_LOGIC_VECTOR ( 6 downto 0 )
agg_result_fu_138_p1  STD_LOGIC_VECTOR ( 1 downto 0 )
agg_result_fu_138_p3  STD_LOGIC_VECTOR ( 1 downto 0 )
agg_result_fu_138_p5  STD_LOGIC_VECTOR ( 1 downto 0 )
agg_result_fu_138_p7  STD_LOGIC_VECTOR ( 1 downto 0 )
ap_ce_reg  STD_LOGIC

Attributes

shreg_extract  string

Instantiations

sparsemux_9_2_7_1_1_u1  BDTModel_sparsemux_9_2_7_1_1 <Entity BDTModel_sparsemux_9_2_7_1_1>

Detailed Description

Definition at line 20 of file BDTModel_decision_function_31.vhd.


The documentation for this class was generated from the following file: