CRC20 Entity Reference

Inheritance diagram for CRC20:

Entities
rtl	architecture

Libraries
ieee
work

Use Clauses
std_logic_1164

Generics
Nbits	positive := 64
CRC_Width	positive := 20
G_Poly	Std_Logic_Vector := x " 8349f "
G_InitVal	std_logic_vector := x " fffff "

Ports
CRC	out	std_logic_vector ( CRC_Width- 1 downto 0 )
Calc	in	std_logic
Clk	in	std_logic
DIn	in	std_logic_vector ( Nbits- 1 downto 0 )
Reset	in	std_logic

Detailed Description

Definition at line 15 of file crc-20.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/data_path/crc-20.vhd