str Architecture Reference

Energy converter module. More...

Signals
Data	std_logic_vector ( INPUT_DATA_WIDTH- 1 downto 0 )
IntegerOutData0	unsigned ( DATA_WIDTH- 7 downto 0 )
IntegerOutData1	unsigned ( DATA_WIDTH- 6 downto 0 )
IntegerOutData2	unsigned ( DATA_WIDTH- 5 downto 0 )
IntegerOutData3	unsigned ( DATA_WIDTH- 4 downto 0 )
IntegerOutData4	unsigned ( DATA_WIDTH- 3 downto 0 )
OverThreshold	std_logic
Data2	std_logic_vector ( DATA_WIDTH- 1 downto 0 )
Data4	std_logic_vector ( DATA_WIDTH- 1 downto 0 )
Saturated	std_logic
Invalid	std_logic
Negative	std_logic
OutData	std_logic_vector ( DATA_WIDTH- 1 downto 0 )
special	std_logic_vector ( 1 downto 0 )

Detailed Description

Energy converter module.

Thie module converts energy value from the multi-linear 10-bit code provided by LAr to the 16-bit linear code used by the algorithm. Input values between 0 and 31 represent negative energy. This modules maps them to 0 in the output.

Author

Francesco Gonnella

Definition at line 36 of file EnergyConverter.vhd.

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The documentation for this class was generated from the following file:

• Algorithm/hdl/EnergyConverter.vhd