PISO_RAW_data Entity Reference

Calorimeter data PISO for process FPGA. More...

Inheritance diagram for PISO_RAW_data:

Entities
Behavioral	architecture
	Calorimeter data PISO for process FPGA. More...

Libraries
IEEE
TOB_rdout_lib

Use Clauses
STD_LOGIC_1164
numeric_std
TOB_rdout_ip_pkg	Package <TOB_rdout_ip_pkg>
data_type_pkg	Package <data_type_pkg>

Ports
RST	in	STD_LOGIC
RAW_link_data_in	in	STD_LOGIC_VECTOR ( 226 downto 0 )
		calorimeter data array 49 x 227b input frames
data_sync_in	in	STD_LOGIC
		calorimeter data valid/synch signal
clk_in_280M	in	STD_LOGIC
		280MHz clock input signal
data_sync_out	out	STD_LOGIC
		calorimeter data synch signal out
data_out_valid	out	STD_LOGIC
		calorimeter data valid signal out
data_out	out	STD_LOGIC_VECTOR ( 35 downto 0 )
		calorimeter Error & Data out 36b

Detailed Description

Calorimeter data PISO for process FPGA.

This is module takes the calorimeter data in at 224 bits per MGT channel, then generates 7 x 32-bit data together with 7 x 1b valid and 1b synch signals

It also changes the 32-b input data to 36-bit ouput data by adding the 4-bit error flags to the 36-bit word. The 4 bit error flags are used when constructing an RAW Readout Frame (event) which are: zero + input_crc + input_disparity + not_in_table

Author

Saeed Taghavi

Definition at line 23 of file PISO_RAW_data.vhd.

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The documentation for this class was generated from the following file:

• Readout/src/PISO_RAW_data.vhd