cntr_ram_addr_10b Entity Reference

10b counter More...

Inheritance diagram for cntr_ram_addr_10b:

Entities
Behavioral	architecture
	10b counter More...

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
std_logic_arith

Ports
CE	in	STD_LOGIC
CLK	in	STD_LOGIC
RST	in	STD_LOGIC
Q	out	STD_LOGIC_VECTOR ( 9 downto 0 )

Detailed Description

10b counter

This is a 10 bit counter. It is used to generate the read/write address for the DPRAM of the TOB/RAW scrolling memories.

Author

Saeed Taghavi

Definition at line 16 of file cntr_ram_addr_10b.vhd.

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The documentation for this class was generated from the following file:

• Readout/src/cntr_ram_addr_10b.vhd