Behavioral Architecture Reference

Counter with double enable. More...

Processes
PROCESS_61	( clk )

Constants
ones	unsigned ( DEPTH- 1 downto 0 ) := ( others = > ' 1 ' )

Signals
cntr	unsigned ( DEPTH- 1 downto 0 )
enable2_i	std_logic
enable1_i	std_logic
RESET_i	std_logic

Detailed Description

Counter with double enable.

If the maximum is reache dthe counter will hold its value

Author

Francesco Gonnella

Mohammes Siyad

Saeed Taghavi

Definition at line 31 of file counter.vhd.

---

The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/MGT/vhdl/counter.vhd