efex_aurora_hub2_cdc_sync_exdes Entity Reference

Inheritance diagram for efex_aurora_hub2_cdc_sync_exdes:

Entities
implementation	architecture

Libraries
ieee

Use Clauses
std_logic_1164
numeric_std
std_logic_misc

Generics
C_CDC_TYPE	integer range 0 to 2 := 1
C_RESET_STATE	integer range 0 to 1 := 0
C_SINGLE_BIT	integer range 0 to 1 := 1
C_FLOP_INPUT	integer range 0 to 1 := 0
C_VECTOR_WIDTH	integer range 0 to 32 := 32
C_MTBF_STAGES	integer range 0 to 6 := 2

Ports
prmry_aclk	in	std_logic
prmry_resetn	in	std_logic
prmry_in	in	std_logic
prmry_vect_in	in	std_logic_vector ( C_VECTOR_WIDTH- 1 downto 0 )
prmry_ack	out	std_logic
scndry_aclk	in	std_logic
scndry_resetn	in	std_logic
scndry_out	out	std_logic
scndry_vect_out	out	std_logic_vector ( C_VECTOR_WIDTH- 1 downto 0 )

Detailed Description

Definition at line 111 of file efex_aurora_hub2_cdc_sync_exdes.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/aurora/efex_aurora_hub2_cdc_sync_exdes.vhd