fsm Architecture Reference

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Processes
clocked_proc	( clk , reset )

Constants
fexid	std_logic_vector ( 1 downto 0 ) := " 01 "
fexfld	std_logic_vector ( 8 downto 0 ) := ( others = > ' 0 ' )

Types
STATE_TYPE	( idle , empty , trialer_0 , kchar , empty_1 , str , wait0 , wait1 , empty_data , fin , wait_2 , wait_3 , trialer_1 , fin1 )

Signals
cntr	unsigned ( 3 downto 0 )
current_state	STATE_TYPE

Detailed Description

Definition at line 46 of file efex_topo_frame_sm.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/Data_Path/efex_topo_frame_sm.vhd