rtl Architecture Reference

led stretch More...

Processes
PROCESS_69	( clk )

Signals
Reg1	std_logic := ' 0 '
Reg2	std_logic := ' 0 '

Detailed Description

led stretch

This module creates two pipeline to the incoming signal

Author

Mohammed Siyad

Definition at line 23 of file led_stretch.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/Process_Common_slave/led_stretch.vhd