link_errors_ORed Entity Reference

This is the RAW Data Error Flag Module. More...

Inheritance diagram for link_errors_ORed:

Entities
Behavioral	architecture
	This is the RAW Data Error Flag Module. More...

Libraries
IEEE
UNISIM
TOB_rdout_lib

Use Clauses
STD_LOGIC_1164
NUMERIC_STD
VCOMPONENTS
data_type_pkg	Package <data_type_pkg>
TOB_rdout_ip_pkg	Package <TOB_rdout_ip_pkg>

Generics
N	integer
	number of input fibre channels

Ports
clk_in	in	STD_LOGIC
rst_in	in	STD_LOGIC
en_error_valid_in	in	STD_LOGIC
		Enable capture of error flags from last RAW input data.
err_flag_in	in	link_error_type
		array of ERROR bits for each MGT input link
err_flag_out	out	STD_LOGIC_VECTOR ( 3 downto 0 )
		4-bit link error ouput to RAW readout (zero + input_crc + input_disparity + not_in_table)
channel_error_map	out	STD_LOGIC_VECTOR ( 48 downto 0 )
		49-bit channel error map to input into RAW readout
req_err_rd_raw	out	std_logic
		flag requesting RAW data readout on error

Detailed Description

This is the RAW Data Error Flag Module.

The input is array of 49 of 4-bit ERROR flags for each MGT input link It creates a status flag of 49-b, each bit is the OR of error flags for the particular input MGT It ORs all the input error flags together to create the 4-bit error signal to be added to the event Also checks the 4-bit error flag to create 1-b flag to request data on error

Author

Saeed Taghavi

Definition at line 24 of file link_errors_ORed.vhd.

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The documentation for this class was generated from the following file:

• Readout/src/link_errors_ORed.vhd