eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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Processes | Signals
Behavioral Architecture Reference

This is the RAW Data Error Flag Module. More...

Processes

U0  ( clk_in )
U1  ( clk_in )

Signals

err_flag_tmp  link_error_type

Detailed Description

This is the RAW Data Error Flag Module.

The input is array of 49 of 4-bit ERROR flags for each MGT input link It creates a status flag of 49-b, each bit is the OR of error flags for the particular input MGT It ORs all the input error flags together to create the 4-bit error signal to be added to the event Also checks the 4-bit error flag to create 1-b flag to request data on error

Author
Saeed Taghavi

Definition at line 44 of file link_errors_ORed.vhd.


The documentation for this class was generated from the following file: