local_bcn_counter.vhd

library IEEE;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
 
entity local_bcn_counter is 
  port (
      clk             : in std_logic;
      reset           : in std_logic;
      bcr             : in std_logic;     
      orbit_length    :in std_logic_vector ( 11 downto 0);
      bcmux_value_sync:in std_logic_vector ( 11 downto 0);
      bcn_cntr        : out std_logic_vector ( 11 downto 0)
      );
end local_bcn_counter ;
architecture Behavioral of local_bcn_counter is
signal counter, orbit_length_i:unsigned (11 downto 0);
 
begin 
orbit_length_i <= unsigned(orbit_length);
 
 bcn_counter: process (clk)
              
              begin 
                if clk'event AND clk = '1' then
                  if reset = '1' then           -- this is a synchronous reset 
                     counter <= (others => '0') ;
                    else
                    if bcr ='1' then
                      counter <= unsigned( bcmux_value_sync);
                      else 
                      counter <= counter +1;
                      if counter =  orbit_length_i-1  then 
                          counter <= (others => '0');
                         end if;
                        end if;
                       end if ; 
                     end if ;                          
                end process  bcn_counter;           
                bcn_cntr <= std_logic_vector( counter);
                        
end Behavioral;