rtl Architecture Reference

Processes
PROCESS_268	( rx_clk )
PROCESS_269	( clk125 )
PROCESS_270	( clk125 )
PROCESS_828	( rx_clk )
PROCESS_829	( clk125 )
PROCESS_830	( clk125 )

Components
mac_fifo

Signals
rx_clk	std_logic
gmii_rx_clk_del	std_logic
txd_e	std_logic_vector ( 7 downto 0 )
rxd_r	std_logic_vector ( 7 downto 0 )
tx_en_e	std_logic
tx_er_e	std_logic
rx_dv_r	std_logic
rx_er_r	std_logic
rxgoodframe	std_logic
rxbadframe	std_logic
txack	std_logic
tx_ready_i	std_logic
rx_data_e	std_logic_vector ( 7 downto 0 )
rx_valid_e	std_logic
fifo_empty	std_logic
rx_en	std_logic
fifo_d	std_logic_vector ( 10 downto 0 )
fifo_q	std_logic_vector ( 10 downto 0 )

Attributes
IODELAY_GROUP	string
IODELAY_GROUP	idelayctrl0 : label is " iodel_gmii_rx "
IODELAY_GROUP	iodelay0 : label is " iodel_gmii_rx "

Instantiations
idelayctrl0	idelayctrl
iodelay0	iodelay
bufg0	bufg
oddr0	oddr
emac0	v5_emac_v1_8 <Entity v5_emac_v1_8>
fifo	mac_fifo
idelayctrl0	idelayctrl
iodelay0	iodelay
bufg0	bufg
oddr0	oddr
emac0	v5_emac_v1_8 <Entity v5_emac_v1_8>
fifo	mac_fifo

Member Function Documentation

PROCESS_268()

PROCESS_268

(

rx_clk

)

PROCESS_269()

PROCESS_269 (   clk125   )

Process

PROCESS_270()

PROCESS_270

(

clk125

)

PROCESS_828()

PROCESS_828

(

rx_clk

)

PROCESS_829()

PROCESS_829 (   clk125   )

Process

PROCESS_830()

PROCESS_830

(

clk125

)

Member Data Documentation

bufg0 [1/2]

bufg0 bufg

Instantiation

bufg0 [2/2]

bufg0 bufg

Instantiation

emac0 [1/2]

emac0 v5_emac_v1_8

Instantiation

emac0 [2/2]

emac0 v5_emac_v1_8

Instantiation

fifo [1/2]

fifo mac_fifo

Instantiation

fifo [2/2]

fifo mac_fifo

Instantiation

fifo_d

fifo_d std_logic_vector ( 10 downto 0 )

Signal

fifo_empty

fifo_empty std_logic

Signal

fifo_q

fifo_q std_logic_vector ( 10 downto 0 )

Signal

gmii_rx_clk_del

gmii_rx_clk_del std_logic

Signal

idelayctrl0 [1/2]

idelayctrl0 idelayctrl

Instantiation

idelayctrl0 [2/2]

idelayctrl0 idelayctrl

Instantiation

iodelay0 [1/2]

iodelay0 iodelay

Instantiation

iodelay0 [2/2]

iodelay0 iodelay

Instantiation

IODELAY_GROUP [1/3]

IODELAY_GROUP string

Attribute

IODELAY_GROUP [2/3]

IODELAY_GROUP idelayctrl0 : label is " iodel_gmii_rx "

Attribute

IODELAY_GROUP [3/3]

IODELAY_GROUP iodelay0 : label is " iodel_gmii_rx "

Attribute

mac_fifo

mac_fifo

Component

oddr0 [1/2]

oddr0 oddr

Instantiation

oddr0 [2/2]

oddr0 oddr

Instantiation

rx_clk

rx_clk std_logic

Signal

rx_data_e

rx_data_e std_logic_vector ( 7 downto 0 )

Signal

rx_dv_r

rx_dv_r std_logic

Signal

rx_en

rx_en std_logic

Signal

rx_er_r

rx_er_r std_logic

Signal

rx_valid_e

rx_valid_e std_logic

Signal

rxbadframe

rxbadframe std_logic

Signal

rxd_r

rxd_r std_logic_vector ( 7 downto 0 )

Signal

rxgoodframe

rxgoodframe std_logic

Signal

tx_en_e

tx_en_e std_logic

Signal

tx_er_e

tx_er_e std_logic

Signal

tx_ready_i

tx_ready_i std_logic

Signal

txack

txack std_logic

Signal

txd_e

txd_e std_logic_vector ( 7 downto 0 )

Signal

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The documentation for this class was generated from the following file:

• components/ipbus_eth/firmware/hdl/eth_v5_gmii.vhd