ROD firmware  1.0.5
ATLAS l1-calo - ROD_eFEX and ROD_jFEX firmware for the L1Calo ROD board

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aurora_pipe Entity Reference
Inheritance diagram for aurora_pipe:
CRC pulse_stretch channel_fifo input_fifos packet_processor rod_top top_rod_efex top_rod_jfex

Entities

RTL  architecture
 

Libraries

IEEE 

Use Clauses

STD_LOGIC_1164 
NUMERIC_STD 
STD_LOGIC_UNSIGNED 

Generics

channel_num  STD_LOGIC_VECTOR ( 11 downto 0 ) := " 000000000000 "
lmem  STD_LOGIC_VECTOR ( 3 downto 0 ) := " 0000 "
max_packet_length  STD_LOGIC_VECTOR ( 15 downto 0 ) := x " 02A0 "

Ports

pp_clock   in   STD_LOGIC
aurora_user_clk   in   STD_LOGIC
reset   in   STD_LOGIC
aurora_chan_stat   in   STD_LOGIC_VECTOR ( 31 downto 0 )
s_axis_tvalid   in   STD_LOGIC
s_axis_tlast   in   STD_LOGIC
s_axis_tdata   in   STD_LOGIC_VECTOR ( 63 downto 0 )
m_axis_tvalid   out   STD_LOGIC
m_axis_tlast   out   STD_LOGIC
m_axis_tdata   out   STD_LOGIC_VECTOR ( 63 downto 0 )
m_first_cyc   out   STD_LOGIC
crc_error   out   STD_LOGIC
m_tval_tob   out   STD_LOGIC
m_tval_calo   out   STD_LOGIC
pkt_len_violation   out   STD_LOGIC
comb_error   in   STD_LOGIC
m_comb_error   out   std_logic

Detailed Description

Definition at line 35 of file aurora_pipe.vhd.


The documentation for this class was generated from the following file: